參數(shù)資料
型號: ADT7460ARQ
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: dB COOL?? Remote Thermal Controller and Fan Controller
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封裝: 0.025 INCH PITCH, MO-137AB, QSOP-16
文件頁數(shù): 18/48頁
文件大?。?/td> 695K
代理商: ADT7460ARQ
REV. 0
–18–
ADT7460
INT
LOW LIMIT
TEMP =
LOW LIMIT
Figure 18. Temperature = Low Limit:
INT
Occurs
NO
INT
HIGH LIMIT
TEMP =
HIGH LIMIT
Figure 19. Temperature = High Limit: No
INT
HIGH LIMIT
INT
TEMP >
HIGH LIMIT
Figure 20. Temperature > High Limit:
INT
Occurs
Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to the
Start bit (Bit 0) of Configuration Register 1 (Reg 0x40). The ADC
measures each analog input in turn and as each measurement
is
completed, the result is automatically stored in the
appropri-
ate value register. This round-robin monitoring cycle continues
unless disabled by writing a 0 to Bit 0 of Configuration Register 1.
As the ADC will normally be left to free-run in this manner, the
time taken to monitor all the analog inputs will normally not be
of interest, as the most recently measured value of any input can
be read out at any time.
For applications where the monitoring cycle time is important,
it can easily be calculated.
The total number of channels measured is:
Two supply voltage inputs (2.5 V and V
CC
)
Local temperature
Two remote temperatures
As mentioned previously, the ADC performs round-robin con-
versions and takes 11.38 ms for each voltage measurement,
12 ms for a local temperature reading, and 25.5 ms for each
remote temperature reading.
The total monitoring cycle time for averaged voltage and tem-
perature monitoring is therefore nominally:
(2 11.38) + 12 + (2 25.5) = 85.76 ms
The round robin starts again 35 ms later. Therefore all channels
are measured approximately every 120 ms
.
Fan TACH measurements are made in parallel and are not
synchronized with the analog measurements in any way.
Status Registers
The results of limit comparisons are stored in Status Registers 1
and 2. The Status Register bit for each channel reflects the status
of the last measurement and limit comparison on that channel. If
a measurement is within limits, the corresponding status register
bit will be cleared to 0. If the measurement is out-of-limits, the
corresponding status register bit will be set to 1.
The state of the various measurement channels may be polled by
reading the Status Registers over the serial bus. In Bit 7 (OOL)
of Status Register 1 (Reg. 0x41), 1 means that an out-of-limit
event has been flagged in Status Register 2. This means that you
need only read Status Register 2 when this bit is set. Alterna-
tively, Pin 5 or Pin 14 can be configured as an
SMBALERT
output. This will automatically notify the system supervisor of an
out-of-limit condition. Reading the Status registers clears the
appropriate status bit as long as the error condition that caused
the interrupt has cleared. Status Register bits are “sticky.” When-
ever a Status bit gets set, indicating an out-of-limit condition, it
will remain set even if the event that caused it has gone away
(until read). The only way to clear the status bit is to read the
Status Register after the event has gone away. Interrupt Status
Mask Registers (Reg. 0x74, 0x75) allow individual interrupt
sources to be masked from causing an
SMBALERT
. However,
if one of these masked interrupt sources goes out-of-limit, its
associated status bit will get set in the Interrupt Status Registers.
相關(guān)PDF資料
PDF描述
ADT7461 【1∑C Temperature Monitor with Series Resistance Cancellation
ADT7461AR 【1∑C Temperature Monitor with Series Resistance Cancellation
ADT7461AR-REEL 【1∑C Temperature Monitor with Series Resistance Cancellation
ADT7461AR-REEL7 【1∑C Temperature Monitor with Series Resistance Cancellation
ADT7461ARM 【1∑C Temperature Monitor with Series Resistance Cancellation
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