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參數(shù)資料
| 型號： | ADUC7020BCPZ62-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 51/104頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 12BIT 1MSPS UART 40-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 44MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | PLA，PWM，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 14 |
| 程序存儲器容量： | 64KB（32K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 5x12b; D/A 4x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADUC7020QSZ-ND - KIT DEV ADUC7020 QUICK START EVAL-ADUC7020MKZ-ND - KIT MINI DEV FOR ADUC7020 |
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ADuC7019/20/21/22/24/25/26/27/28/29
Data Sheet
Rev. F | Page 50 of 104
Table 28. VCM Ranges
AVDD
VREF
VCM Min
VCM Max
Signal Peak-to-Peak
3.3 V
2.5 V
1.25 V
2.05 V
2.5 V
2.048 V
1.024 V
2.276 V
2.048 V
1.25 V
0.75 V
2.55 V
1.25 V
3.0 V
2.5 V
1.25 V
1.75 V
2.5 V
2.048 V
1.024 V
1.976 V
2.048 V
1.25 V
0.75 V
2.25 V
1.25 V
CALIBRATION
By default, the factory-set values written to the ADC offset
(ADCOF) and gain coefficient registers (ADCGN) yield
optimum performance in terms of end-point errors and
linearity for standalone operation of the part (see the
Specifications section). If system calibration is required, it is
possible to modify the default offset and gain coefficients to
improve end-point errors, but note that any modification to the
factory-set ADCOF and ADCGN values can degrade ADC
linearity performance.
For system offset error correction, the ADC channel input stage
must be tied to AGND. A continuous software ADC conversion
loop must be implemented by modifying the value in ADCOF until
the ADC result (ADCDAT) reads Code 0 to Code 1. If the
ADCDAT value is greater than 1, ADCOF should be decremented
until ADCDAT reads 0 to 1. Offset error correction is done
digitally and has a resolution of 0.25 LSB and a range of
±3.125% of VREF.
For system gain error correction, the ADC channel input stage
must be tied to VREF. A continuous software ADC conversion
loop must be implemented to modify the value in ADCGN
until the ADC result (ADCDAT) reads Code 4094 to Code 4095.
If the ADCDAT value is less than 4094, ADCGN should be
incremented until ADCDAT reads 4094 to 4095. Similar to the
offset calibration, the gain calibration resolution is 0.25 LSB
with a range of ±3% of VREF.
TEMPERATURE SENSOR
The ADuC7019/20/21/22/24/25/26/27/28/29 provide voltage
output from on-chip band gap references proportional to
absolute temperature. This voltage output can also be routed
through the front-end ADC multiplexer (effectively an additional
ADC channel input) facilitating an internal temperature sensor
channel, measuring die temperature to an accuracy of ±3°C.
The following is an example routine showing how to use the
internal temperature sensor:
int main(void)
{
float a = 0;
short b;
ADCCON = 0x20;
// power-on the ADC
delay(2000);
ADCCP = 0x10;
// Select Temperature
Sensor as an // input to the ADC
REFCON = 0x01; // connect internal 2.5V
reference // to Vref pin
ADCCON = 0xE4; // continuous conversion
while(1)
{
while (!ADCSTA){};
// wait for end of conversion
b = (ADCDAT >> 16);
// To calculate temperature in °C, use
the formula:
a = 0x525 - b;
// ((Temperature = 0x525 - Sensor
Voltage) / 1.3)
a /= 1.3;
b = floor(a);
printf("Temperature: %d
oC\n",b);
}
return 0;
}
BAND GAP REFERENCE
Each ADuC7019/20/21/22/24/25/26/27/28/29 provides an on-
chip band gap reference of 2.5 V, which can be used for the ADC
and DAC. This internal reference also appears on the VREF pin.
When using the internal reference, a 0.47 F capacitor must be
connected from the external VREF pin to AGND to ensure stability
and fast response during ADC conversions. This reference can
also be connected to an external pin (VREF) and used as a refer-
ence for other circuits in the system. An external buffer is required
because of the low drive capability of the VREF output. A program-
mable option also allows an external reference input on the VREF
pin. Note that it is not possible to disable the internal reference.
Therefore, the external reference source must be capable of
overdriving the internal reference source.
Table 29. REFCON Register
Name
Address
Default Value
Access
REFCON
0xFFFF048C
0x00
R/W
The band gap reference interface consists of an 8-bit MMR
REFCON, described in Table 30.
Table 30. REFCON MMR Bit Designations
Bit
Description
7:1
Reserved.
0
Internal reference output enable. Set by user to
connect the internal 2.5 V reference to the VREF pin.
The reference can be used for an external component
but must be buffered. Cleared by user to disconnect
the reference from the VREF pin.
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