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ADuC702x Series
Preliminary Technical Data
ratio are critical, the analog input should be driven from a low
impedance source. Large source impedances will significantly
affect the AC performance of the ADC. This may necessitate
the use of an input buffer amplifier. The choice of the op amp
will be a function of the particular application.
Rev. PrB | Page 30 of 80
D
C1
D
AV
DD
R1
C2
D
C1
D
AV
DD
R1
C2
Figure 15: Equivalent Analog Input Circuit
Conversion Phase: Switches Open
Track Phase: Switches Closed
When no amplifier is used to drive the analog input, the source
impedance should be limited to values lower than 1 k
maximum source impedance will depend on the amount of
total harmonic distortion (THD) that can be tolerated. The
THD will increase as the source impedance increases and the
performance will degrade.
. The
DRIVING THE ANALOG INPUTS
Internal or external reference can be used for the ADC. In
differential mode of operation, there are restrictions on
common mode input signal (V
CM
) that are dependant on
reference value and supply voltage used to ensure that the signal
remains within the supply rails. Table 10 gives some calculated
V
CM
min V
CM
max for some conditions.
Table 10: V
CM
ranges
V
CM
min
AVDD
VREF
V
CM
max
Signal
Peak-Peak
2.5V
2.048V
1.25
2.5V
2.048V
1.25
2.5V
2.048V
1.25
2.5V
2.048V
1.25
1.25V
2.05V
1.024V
2.276V
3.3V
0.75V
2.55V
1.25V
1.75V
1.024V
1.976V
3.0V
0.75V
2.25V
ADC CALIBRATION
System calibration or device calibration are performed in
software. Two 10-bit registers are available for calibration,
ADCOF and ADCGN.
For offset error correction, either an external pin must be tied to
AGND (system calibration) or the internal AGND channel
must be selected (device calibration). A software loop must be
implemented to tweak the value in ADCOF register each time
until the transition of ADCDAT reads code 0 to 1. Offset error
correction is done digitally and has a resolution of 0.25 lsb and
a range of +/- 3.125% of VREF.
For gain error correction, either an external pin must be tied to
VREF (system calibration) or the internal reference channel
must be selected (device calibration). A software loop must be
implemented to tweak the value in ADCGN register each time
until the transition of ADCDAT reads code 4094 to 4095.
Similar to the offset calibration, the gain calibration resolution
is 0.25 lsb with a range of +/- 3% of VREF.
TEMPERATURE SENSOR
The ADuC702x provides a voltage output from an on-chip
bandgap reference proportional to absolute temperature. It can
also be routed through the front end ADC multiplexer
(effectively an additional ADC channel input) facilitating an
internal
temperature
sensor
temperature to an accuracy of
±
3
°
C.
BANDGAP REFERENCE
channel,
measuring
die
The ADuC702x provides an on-chip bandgap reference of 2.5V,
which can be used for the ADC and for the DAC. This internal
reference also appears on the V
REF
pin. When using the internal
reference, a capacitor of 0.47
μ
F must be connected from the
external V
REF
pin to AGND, to ensure stability and fast response
during ADC conversions. This reference can also be connected
to an external pin (VREF) and used as a reference for other
circuits in the system. An external buffer would be required
because of the low drive capability of the VREF output. A
programmable option also allows an external reference input on
the V
REF
pin.
The bandgap reference interface consists on a 8-bit MMR,
REFCON described in
Table 11
.