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參數(shù)資料
型號(hào)： ADUC814ARU
廠商： Analog Devices Inc
文件頁數(shù)： 37/72頁
文件大小： 0K
描述： IC ADC 12BIT W/FLASH MCU 28TSSOP
標(biāo)準(zhǔn)包裝： 50
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 16.78MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 17
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 640 x 8
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x12b; D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
包裝： 管件
配用： EVAL-ADUC814QSZ-ND - KIT DEV FOR ADUC814 MICROCONVRTR
ADuC814
Rev. A | Page 42 of 72
POWER SUPPLY MONITOR
As its name suggests, the power supply monitor, once enabled,
monitors the supply (DVDD) on the ADuC814. It indicates when
any of the supply pins drop below one of four user-selectable
voltage trip points from 2.63 V to 4.63 V. For correct operation
of the power supply monitor function, DVDD must be equal to
or greater than 2.7 V. Monitor function is controlled via the
PSMCON SFR. If enabled via the IEIP2 SFR, the monitor
interrupts the core using the PSMI bit in the PSMCON SFR.
This bit is not cleared until the failing power supply has
returned above the trip point for at least 250 ms. This monitor
function allows the user to save working registers to avoid
possible data loss due to the low supply condition, and also
ensures that normal code execution does not resume until a safe
supply level is well established. The supply monitor is also
protected against spurious glitches triggering the interrupt
circuit.
PSMCON
Power Supply Monitor Control Register
SFR Address
DFH
Power-On Default
DEH
Bit Addressable
No
----
CMPD
PSMI
TPD1
TPD0
----
PSMEN
Table 16. PSMCON SFR Bit Designations
Bit No.
Name
Description
7
PSMCON.7
Reserved.
6
CMPD
DVDD Comparator Bit.
This is a read-only bit and directly reflects the state of the DVDD comparator.
Read 1 indicates that the DVDD supply is above its selected trip point.
Read 0 indicates that the DVDD supply is below its selected trip point.
5
PSMI
Power Supply Monitor Interrupt Bit.
This bit is set high by the MicroConverter if CMPD is low, indicating low digital supply. The PSMI bit can be used to
interrupt the processor. Once CMPD returns and remains high, a 250 ms counter is started. When this counter
times out, the PSMI interrupt is cleared. PSMI can also be written by the user; however, if the comparator output is
low, it is not possible for the user to clear PSMI.
4
TPD1
DVDD Trip Point Selection Bits.
These bits select the DVDD trip-point voltage as follows:
TPD1
TPD0
Selected DVDD Trip Point (V)
0
4.63
0
1
3.08
1
0
2.93
3
TPD0
1
2.63
2
PSMCON.2
Reserved.
1
PSMCON.1
Reserved.
0
PSMEN
Power Supply Monitor Enable Bit.
Set to 1 by the user to enable the power supply monitor circuit.
Cleared to 0 by the user to disable the power supply monitor circuit.
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