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參數(shù)資料
| 型號： | ADUC842BCPZ32-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/88頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 32K FLASH ADC/DAC 56LFCSP |
| 標準包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16.78MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | DMA，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 32KB（32K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 包裝： | 托盤 |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 32 of 88
A 4 kByte Flash/EE data memory space is also provided on-
chip. This may be used as a general-purpose nonvolatile
scratchpad area. User access to this area is via a group of six
SFRs. This space can be programmed at a byte level, although it
must first be erased in 4-byte pages.
Flash/EE Memory Reliability
The Flash/EE program and data memory arrays on the parts are
fully qualified for two key Flash/EE memory characteristics:
Flash/EE memory cycling endurance and Flash/EE memory
data retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of four independ-
ent, sequential events, defined as
1.
Initial page erase sequence.
2.
Read/verify sequence a single Flash/EE.
3.
Byte program sequence memory.
4.
Second read/verify sequence endurance cycle.
In reliability qualification, every byte in both the program and
data Flash/EE memory is cycled from 00H to FFH until a first
fail is recorded, signifying the endurance limit of the on-chip
Flash/EE memory.
As indicated in the Specifications table, the parts’ Flash/EE
memory endurance qualification has been carried out in
accordance with JEDEC Retention Lifetime Specification A117
over the industrial temperature range of –40°C to +25°C and
+25°C to +85°C. The results allow the specification of a mini-
mum endurance figure over supply and over temperature of
100,000 cycles, with an endurance figure of 700,000 cycles being
typical of operation at 25°C.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the parts have
been qualified in accordance with the formal JEDEC Retention
Lifetime Specification (A117) at a specific junction temperature
(TJ = 55°C). As part of this qualification procedure, the Flash/EE
memory is cycled to its specified endurance limit, described
previously, before data retention is characterized. This means
that the Flash/EE memory is guaranteed to retain its data for its
fully specified retention lifetime every time the Flash/EE
memory is reprogrammed. Also note that retention lifetime,
based on an activation energy of 0.6 eV, derates with TJ as
shown in Figure 38.
40
60
70
90
TJ JUNCTION TEMPERATURE (°C)
RE
TE
NTION
(Years)
250
200
150
100
50
0
50
80
110
300
100
ADI SPECIFICATION
100 YEARS MIN.
AT TJ = 55°C
03260-0-037
Figure 38. Flash/EE Memory Data Retention
Using the Flash/EE Program Memory
The 62 kByte Flash/EE program memory array is mapped into
the lower 62 kBytes of the 64 kByte program space addressable
by the parts, and is used to hold user code in typical applica-
tions. The program Flash/EE memory array can be
programmed in three ways:
Serial Downloading (In-Circuit Programming)
The parts facilitate code download via the standard UART serial
port. The parts enter serial download mode after a reset or
power cycle if the PSEN pin is pulled low through an external
1 k resistor. Once in serial download mode, the user can
download code to the full 62 kBytes of Flash/EE program
memory while the device is in-circuit in its target application
hardware.
A PC serial download executable is provided as part of the
ADuC841/ADuC842 QuickStart development system. The
serial download protocol is detailed in MicroConverter
Application Note uC004.
Parallel Programming
Parallel programming mode is fully compatible with conven-
tional third party flash or EEPROM device programmers. In
this mode, Ports P0, P1, and P2 operate as the external data and
address bus interface, ALE operates as the write enable strobe,
and Port P3 is used as a general configuration port, which
configures the device for various program and erase operations
during parallel programming. The high voltage (12 V) supply
required for flash programming is generated using on-chip
charge pumps to supply the high voltage program lines. The
complete parallel programming specification is available on the
MicroConverter home page at www.analog.com/microconverter.
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