ADV7125
Rev. C | Page 4 of 16
3.3 V ELECTRICAL CHARACTERISTICS
VAA = 3.0 V to 3.6 V, VREF = 1.235 V, RSET = 560 Ω, CL = 10 pF. All specifications TMIN to TMAX,1 unless otherwise noted, TJ MAX = 110°C. Table 2.
Min
Typ
Max
Unit
STATIC PERFORMANCE
Resolution (Each DAC)
8
Bits
RSET = 680 Ω
Integral Nonlinearity (BSL)
1
±0.5
+1
LSB
RSET = 680 Ω
Differential Nonlinearity
1
±0.25
+1
LSB
RSET = 680 Ω
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
2.0
V
Input Low Voltage, VIL
0.8
V
Input Current, IIN
1
+1
μA
VIN = 0.0 V or VDD
PSAVE Pull-Up Current
20
μA
Input Capacitance, CIN
10
pF
ANALOG OUTPUTS
Output Current
2.0
26.5
mA
Green DAC, SYNC = high
2.0
18.5
mA
RGB DAC, SYNC = low
DAC-to-DAC Matching
1.0
%
Output Compliance Range, VOC
0
1.4
V
Output Impedance, ROUT
70
kΩ
Output Capacitance, COUT
10
pF
Offset Error
0
% FSR
Tested with DAC output = 0 V
0
% FSR
FSR = 18.62 mA
VOLTAGE REFERENCE, EXTERNAL
Reference Range, VREF
1.12
1.235
1.35
V
VOLTAGE REFERENCE, INTERNAL
Voltage Reference, VREF
1.235
V
POWER DISSIPATION
2.2
5.0
mA
fCLK = 50 MHz
6.5
12.0
mA
fCLK = 140 MHz
11
15
mA
fCLK = 240 MHz
16
mA
fCLK = 330 MHz
Analog Supply Current
67
72
mA
RSET = 560 Ω
8
mA
RSET = 4933 Ω
Standby Supply Current
2.1
5.0
mA
PSAVE = low, digital, and control inputs at VDD
Power Supply Rejection Ratio
0.1
0.5
%/%
1 Temperature range TMIN to TMAX: 40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz.
2 These max/min specifications are guaranteed by characterization in the 3.0 V to 3.6 V range.
3 Gain error = ((Measured (FSC)/Ideal (FSC) 1) × 100), where Ideal = VREF/RSET × K × (0xFFH) × 4 and K = 7.9896.
4 Digital supply is measured with continuous clock that has data input corresponding to a ramp pattern and with an input level at 0 V and VDD.