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參數資料
| 型號： | ADV7127KRUZ50-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 12/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO 50MHZ 3.3/5 24TSSOP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 2,500 |
| 設置時間： | 15ns |
| 位數： | 10 |
| 數據接口： | 并聯 |
| 轉換器數目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 30mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 240M |
| 其它名稱： | ADV7127KRUZ50REEL |
–5–
REV. 0
ADV7127
3.3 V TSSOP SPECIFICATIONS1
Parameter
Min
Typ
Max
Units
Test Conditions
STATIC PERFORMANCE
Resolution (Each DAC)
10
Bits
RSET = 680
Integral Nonlinearity (BSL)
–1
0.5
+1
LSB
RSET = 680
Differential Nonlinearity
–1
0.25
+1
LSB
RSET = 680
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
2.0
V
Input Low Voltage, VIL
0.8
V
PDOWN Input High Voltage3
2.1
V
PDOWN Input Low Voltage3
0.6
V
Input Current, IIN
–1
+1
AV
IN = 0.0 V or VDD
PSAVE Pull-Up Current
20
A
Input Capacitance, CIN
10
pF
ANALOG OUTPUTS
Output Current
2.0
18.5
mA
Output Compliance Range, VOC
0
+1.4
V
Output Impedance, ROUT
70
k
Output Capacitance, COUT
10
pF
Offset Error
0
% FSR
Tested with DAC Output = 0 V
Gain Error
4
0
% FSR
FSR = 17.62 mA
VOLTAGE REFERENCE (Ext.)
Reference Range, VREF
1.12
1.235
1.35
V
VOLTAGE REFERENCE (Int.)5
Reference Range, VREF
1.235
V
POWER DISSIPATION
Digital Supply Current6
12
mA
fCLK = 50 MHz
Digital Supply Current6
2.5
4.5
mA
fCLK = 140 MHz
Digital Supply Current6
46
mA
fCLK = 240 MHz
Analog Supply Current
22
25
mA
RSET = 560
Analog Supply Current
5
mA
RSET = 4933
Standby Supply Current
2.6
3
mA
PSAVE = Low, Digital and Control
Inputs at VDD
PDOWN Supply Current
20
A
Power Supply Rejection Ratio
0.1
0.5
%/%
NOTES
1These max/min specifications are guaranteed by characterization to be over 3.0 V to 3.6 V range.
2Temperature range T
MIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
3This power-down feature is only available on the ADV7127 in the TSSOP package.
4Gain error = ((Measured (FSC)/Ideal (FSC) –1)
× 100), where Ideal = V
REF /RSET × K × (3FFH) and K = 7.9896.
5Internal voltage reference is available only on the ADV7127 TSSOP package.
6Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V
DD.
Specifications subject to change without notice.
(VAA = +3.0 V–3.6 V, VREF = 1.235 V, RSET = 560
, CL = 10 pF. All specifications TMIN to TMAX
2
unless otherwise noted, TJ MAX = 110 C)
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