參數資料
型號: ADV7301A
廠商: Analog Devices, Inc.
英文描述: Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV⑩ 12-Bit DACs
中文描述: 多格式統(tǒng)計,逐行掃描/ HDTV視頻編碼器與六噪聲整形⑩12位DAC
文件頁數: 17/68頁
文件大?。?/td> 1544K
代理商: ADV7301A
REV. A
ADV7300A/ADV7301A
–17–
Table III. Mode Register
Subaddress Register
Bit Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
Reset
02h
Mode Register 0
Reserved
0
0
Zero must be written
to these bits.
Disabled
20h
0
1
Enabled. 0x11h, Bit 2
must also be enabled.
Disable Programmable
RGB Matrix
Enable Programmable
RGB Matrix
No SYNC
0
1
0
1
SYNC on all RGB
Outputs
RGB Component
Outputs
YUV Component
Outputs
No SYNC Output
0
1
0
1
Output SD SYNCs on
S_HSYNC
and
S_VSYNC
No SYNC Output
0
1
Output HD SYNCs
on
S_HSYNC
and
S_VSYNC
LSB for GY
03h
RGB Matrix 0
X
X
03h
04h
RGB Matrix 1
X
X
LSB for RV
F0h
X
X
LSB for BU
X
X
LSB for GV
X
X
LSB for GU
05h
RGB Matrix 2
X
X
X
X
X
X
X
X
Bits 9–2 for GY
4Eh
06h
RGB Matrix 3
X
X
X
X
X
X
X
X
Bits 9–2 for GU
0Eh
07h
RGB Matrix 4
X
X
X
X
X
X
X
X
Bits 9–2 for GV
24h
08h
RGB Matrix 5
X
X
X
X
X
X
X
X
Bits 9–2 for BU
92h
09h
RGB Matrix 6
X
X
X
X
X
X
X
X
Bits 9–2 for RV
7Ch
0Ah
Reserved
00h
0Bh
Reserved
00h
0Ch
Reserved
00h
0Dh
Reserved
00h
0Eh
Reserved
00h
0Fh
Reserved
00h
SD SYNC
HD SYNC
Test Pattern Black Bar
RGB Matrix
SYNC on RGB
RGB/YUV Output
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