DATA AND I2C TIMING CHARACTERISTICS Tab" />
參數(shù)資料
型號(hào): ADV7623BSTZ-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 0K
描述: IC TXRX HDMI 1:4 144LQFP
標(biāo)準(zhǔn)包裝: 500
系列: Xpressview™
類(lèi)型: 收發(fā)器,HDMI
驅(qū)動(dòng)器/接收器數(shù): 1/4
電源電壓: 5V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 帶卷 (TR)
Data Sheet
ADV7623
Rev. D | Page 5 of 16
DATA AND I2C TIMING CHARACTERISTICS
Table 2.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
VIDEO SYSTEM CLOCK AND XTAL
Crystal Nominal Frequency
28.63636
MHz
Crystal Frequency Stability
±50
ppm
External Clock Source1
External crystal must operate at 1.8 V
Input High Voltage
VIH
XTAL driven with external clock source
1.2
V
Input Low Voltage
VIL
XTAL driven with external clock source
0.4
V
RESET FEATURE
Reset Pulse Width
5
ms
I2C PORTS (FAST MODE)
xCL Frequency2
400
kHz
xCL Minimum Pulse Width High2
t1
600
ns
xCL Minimum Pulse Width Low2
t2
1.3
s
Hold Time (Start Condition)
t3
600
ns
Setup Time (Start Condition)
t4
600
ns
xDA Setup Time2
t5
100
ns
xCL and xDA Rise Time2
t6
300
ns
xCL and xDA Fall Time2
t7
300
ns
Setup Time (Stop Condition)
t8
0.6
s
I2C PORTS (NORMAL MODE)
xCL Frequency2
100
kHz
xCL Minimum Pulse Width High2
t1
4.0
s
xCL Minimum Pulse Width Low2
t2
4.7
s
Hold Time (Start Condition)
t3
4.0
s
Setup Time (Start Condition)
t4
4.7
s
xDA Setup Time2
t5
250
ns
xCL and xDA Rise Time2
t6
1000
ns
xCL and xDA Fall Time2
t7
300
ns
Setup Time (Stop Condition)
t8
4.0
s
AUDIO OUTPUT PORT (MASTER MODE)
SCLK Mark Space Ratio
t13:t14
45:55
55:45
% duty
cycle
APx_OUT Data Transition Time (LRCLK)3
t15
End of valid data to negative SCLK edge
10
ns
APx_OUT Data Transition Time (LRCLK)3
t16
Negative SCLK edge to start of valid data
10
ns
APx_OUT Data Transition Time (I2S Data)3
t17
End of valid data to negative SCLK edge
5
ns
APx_OUT Data Transition Time (I2S Data)3
t18
Negative SCLK edge to start of valid data
5
ns
AUDIO INPUT PORT
APx_IN Setup Time (I2S Data)3
t19
2
ns
APx_IN Hold Time (I2S Data)3
t20
2
ns
APx_IN Setup Time (LRCLK)3
t19
2
ns
APx_IN Hold Time (LRCLK)3
t20
2
ns
1
This part must be configured for external oscillator operation. A 1.8 V oscillator must be used.
2
The prefix x refers to S, DDCA_S, DDCB_S, DDCC_S, and DDCD_S.
3
The suffix x refers to 0, 1, 2, 3, 4, and 5.
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