參數(shù)資料
型號(hào)： ADV7842KBCZ-5
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/28頁(yè)
文件大?。?/td> 0K
描述： IC DECODER 3D/4CH HDMI 256CSBGA
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®, Xpressview™
類型： HDMI，接收器
應(yīng)用： HDTV，投影儀，機(jī)頂盒
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA，CSBGA
供應(yīng)商設(shè)備封裝： 256-CSPBGA（17x17）
包裝： 托盤
ADV7842
Rev. B | Page 18 of 28
Pin No.
Mnemonic
Type
Description
M12
GND
Ground
Ground.
M13
GND
Ground
Ground.
M14
GND
Ground
Ground.
M15
GND
Ground
Ground.
M16
GND
Ground
Ground.
N1
LLC
Digital video output
Line-Locked Output Clock for the Pixel Data.
N2
P24
Digital video output
Video Pixel Output Port.
N3
INT2
Miscellaneous digital
Interrupt. This pin can be active low or active high. When status bits change, this pin is
triggered. The events that trigger an interrupt are under user control.
N4
TEST4
Test
Connect this pin to ground.
N5
RESET
Miscellaneous digital
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required
to reset the ADV7842 circuitry.
N6
TEST6
Test
Float this pin.
N7
SDRAM_A8
SDRAM interface
Address Output. Interface to external RAM address lines.
N8
SDRAM_A4
SDRAM interface
Address Output. Interface to external RAM address lines.
N9
SDRAM_A0
SDRAM interface
Address Output. Interface to external RAM address lines.
N10
SDRAM_CS
SDRAM interface
Chip Select. SDRAM_CS enables and disables the command decoder on the RAM. One
of four command signals to the external SDRAM.
N11
SDRAM_LDQS
SDRAM interface
Lower Data Strobe Pin. Data strobe pins are used for the RAM interface. This is an input
when reading data from external memory and an output when writing data to external
memory. It is edge aligned with data when reading from external memory and centered
with data when writing to external memory. SDRAM_LDQS corresponds to the data on
SDRAM_DQ7 to SDRAM_DQ0.
N12
SDRAM_DQ4
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
N13
SDRAM_DQ15
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
N14
SDRAM_DQ11
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
N15
SDRAM_CK
SDRAM interface
Differential Clock Output. All address and control output signals to the RAM should be
sampled on the positive edge of SDRAM_CK and on the negative edge of SDRAM_CK.
N16
SDRAM_CKE
SDRAM interface
Clock Enable. This pin acts as an enable to the clock signals of the external RAM.
P1
P25
Digital video output
Video Pixel Output Port.
P2
P26
Digital video output
Video Pixel Output Port.
P3
TEST5
Test
Connect this pin to ground.
P4
AVLINK
Digital input/output
Digital SCART Control Channel.
P5
TEST7
Test
Float this pin.
P6
SDRAM_A11
SDRAM interface
Address Output. Interface to external RAM address lines.
P7
SDRAM_A7
SDRAM interface
Address Output. Interface to external RAM address lines.
P8
SDRAM_A3
SDRAM interface
Address Output. Interface to external RAM address lines.
P9
SDRAM_A10
SDRAM interface
Address Output. Interface to external RAM address lines.
P10
SDRAM_RAS
SDRAM interface
Row Address Select Command Signal. One of four command signals to the external
SDRAM.
P11
SDRAM_DQ7
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
P12
SDRAM_DQ3
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
P13
SDRAM_VREF
SDRAM interface
1.25 V Reference for DDR SDRAM Interface or 1.65 V for SDR SDRAM Interface.
P14
SDRAM_DQ12
SDRAM interface
Data Bus. Interface to external RAM 16-bit data bus.
P15
SDRAM_UDQS
SDRAM interface
Upper Data Strobe Pin. Data strobe pins are used for the RAM interface. This is an input
when reading data from external memory and an output when writing data to external
memory. It is edge aligned with data when reading from external memory and centered
with data when writing to external memory. SDRAM_UDQS corresponds to the data
on SDRAM_DQ15 to SDRAM_DQ8.
P16
SDRAM_CK
SDRAM interface
Differential Clock Output. All address and control output signals to the RAM should be
sampled on the positive edge of SDRAM_CK and on the negative edge of SDRAM_CK.
R1
P27
Digital video output
Video Pixel Output Port.
R2
P28
Digital video output
Video Pixel Output Port.
R3
P30
Digital video output
Video Pixel Output Port.
R4
P32
Digital video output
Video Pixel Output Port.
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