5-10 Revision 4 Advance 1.0 (continued) In Table 2-47 ADC Characteristics in Direct" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AFS1500-1FG676
寤犲晢锛� Microsemi SoC
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 253/334闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 8MB FLASH 1.5M 676-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 40
绯诲垪锛� Fusion®
RAM 浣嶇附瑷�(j矛)锛� 276480
杓稿叆/杓稿嚭鏁�(sh霉)锛� 252
闁€(m茅n)鏁�(sh霉)锛� 1500000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 85°C
灏佽/澶栨锛� 676-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 676-FBGA锛�27x27锛�
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Datasheet Information
5-10
Revision 4
Advance 1.0
(continued)
In Table 2-47 ADC Characteristics in Direct Input Mode, the commercial conditions
were updated and note 2 is new.
2-121
The VCC33ACAP signal name was changed to "XTAL1 Crystal Oscillator Circuit
Input".
2-228
Table 2-48 Uncalibrated Analog Channel Accuracy* is new.
2-123
Table 2-49 Calibrated Analog Channel Accuracy 1,2,3 is new.
2-124
Table 2-50 Analog Channel Accuracy: Monitoring Standard Positive Voltages is
new.
2-125
In Table 2-57 Voltage Polarity Control Truth Table鈥擜V (x = 0), AC (x = 1), and AT
(x = 3)*, the following I/O Bank names were changed:
Hot-Swap changed to Standard
LVDS changed to Advanced
2-131
In Table 2-58 Prescaler Op Amp Power-Down Truth Table鈥擜V (x = 0), AC (x = 1),
and AT (x = 3), the following I/O Bank names were changed:
Hot-Swap changed to Standard
LVDS changed to Advanced
2-132
In the title of Table 2-64 I/O Standards Supported by Bank Type, LVDS I/O was
changed to Advanced I/O.
2-134
The title was changed from "Fusion Standard, LVDS, and Standard plus Hot-Swap
I/O" to Table 2-68 Fusion Standard and Advanced I/O Features. In addition, the
table headings were all updated. The heading used to be Standard and LVDS I/O
and was changed to Advanced I/O. Standard Hot-Swap was changed to just
Standard.
2-136
This sentence was deleted from the "Slew Rate Control and Drive Strength" section:
The Standard hot-swap I/Os do not support slew rate control. In addition, these
references were changed:
From: Fusion hot-swap I/O (Table 2-69 on page 2-122) To: Fusion Standard I/O
From: Fusion LVDS I/O (Table 2-70 on page 2-122) To: Fusion Advanced I/O
2-152
The "Cold-Sparing Support" section was significantly updated.
2-143
In the title of Table 2-75 Fusion Standard I/O Standards鈥擮UT_DRIVE Settings,
Hot-Swap was changed to Standard.
2-153
In the title of Table 2-76 Fusion Advanced I/O Standards鈥擲LEW and OUT_DRIVE
Settings, LVDS was changed to Advanced.
2-153
In the title of Table 2-81 Fusion Standard and Advanced I/O Attributes vs. I/O
Standard Applications, LVDS was changed to Advanced.
2-157
In Figure 2-111 Naming Conventions of Fusion Devices with Three Digital I/O
Banks and Figure 2-112 Naming Conventions of Fusion Devices with Four I/O
Banks the following names were changed:
Hot-Swap changed to Standard
LVDS changed to Advanced
2-160
The Figure 2-113 Timing Model was updated.
2-161
In the notes for Table 2-86 Summary of Maximum and Minimum DC Input Levels
Applicable to Commercial and Industrial Conditions, TJ was changed to TA.
2-166
Revision
Changes
Page
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
AT88SC12816C-PU IC EEPROM 128KBIT 1.5MHZ 8DIP
M1AFS1500-1FGG676 IC FPGA 8MB FLASH 1.5M 676-FBGA
AFS1500-1FGG676 IC FPGA 8MB FLASH 1.5M 676-FBGA
EPF10K50VQI240-2N IC FLEX 10KV FPGA 50K 240-PQFP
EPF10K50VQI240-2 IC FLEX 10KV FPGA 50K 240-PQFP
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AFS1500-1FGG256I 鍔熻兘鎻忚堪:IC FPGA 8MB FLASH 1.5M 256-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:Fusion® 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€(m茅n)鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛�
AFS1500-1FGG256K 鍔熻兘鎻忚堪:IC FPGA 8MB FLASH 1.5M 256-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:Fusion® 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€(m茅n)鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:352-CQFP锛�75x75锛�