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參數(shù)資料
| 型號： | AGL10005-FG484I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1000000 GATES, 250 MHz, PBGA484 |
| 封裝： | 13 X 13 MM, 1 MM PITCH, FBGA-144 |
| 文件頁數(shù)： | 172/204頁 |
| 文件大?。?/td> | 2800K |
| 代理商： | AGL10005-FG484I |
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IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology
A d v an c ed v0 . 1
1-1
Introduction and Overview
General Description
The IGLOO family of flash FPGAs, based on a 130-nm flash
process, offers the lowest power FPGA, a single-chip
solution, small footprint packages, reprogrammability,
and an abundance of advanced features.
The Flash*Freeze technology used in IGLOO devices
enables entering and exiting an ultra-low-power mode
that consumes as little as 5 W while retaining SRAM
and register data. Flash*Freeze technology simplifies
power management through I/O and clock management
with rapid recovery to operation mode.
The Low Power Active capability (static idle) allows for
ultra-low-power consumption (from 25 W) while the
IGLOO device is completely functional in the system. This
allows the IGLOO device to control system power
management based on external inputs (e.g., scanning for
keyboard stimulus) while consuming minimal power.
Nonvolatile flash technology gives IGLOO devices the
advantage of being a secure, low power, single-chip
solution that is live at power-up (LAPU). IGLOO is
reprogrammable and offers time-to-market benefits at
an ASIC-level unit cost.
These features enable designers to create high-density
systems using existing ASIC or FPGA design flows and
tools.
IGLOO devices offer 1 kbit of on-chip, reprogrammable,
nonvolatile
FlashROM
storage
as
well
as
clock
conditioning circuitry based on an integrated phase-
locked loop (PLL). The AGL030 device has no PLL or RAM
support. IGLOO devices have up to 1 million system
gates, supported with up to 144 kbits of true dual-port
SRAM and up to 288 user I/Os.
Flash*Freeze Technology
The
IGLOO
device
offers
unique
Flash*Freeze
technology, allowing the device to enter and exit ultra-
low-power Flash*Freeze mode. IGLOO devices do not
need additional components to turn off I/Os or clocks
while retaining the design information, SRAM content,
and registers. Flash*Freeze technology is combined with
in-system programmability, which enables users to
quickly and easily upgrade and update their designs in
the final stages of manufacturing or in the field. The
ability of IGLOO V2 devices to support a 1.2 V core
voltage allows further reduction in power consumption,
thus achieving the lowest total system power.
When the IGLOO device enters Flash*Freeze mode, the
device automatically shuts off the clocks and inputs to the
FPGA core; when the device exits Flash*Freeze mode, all
activity resumes and data is retained.
The availability of low-power modes, combined with
reprogrammability, a single-chip and single-voltage
solution, and availability of small-footprint, high pin-
count packages, make IGLOO devices the best fit for
portable electronics.
Flash Advantages
Low Power
Flash-based IGLOO devices exhibit power characteristics
similar to those of an ASIC, making them an ideal choice
for power-sensitive applications. IGLOO devices have
only a very limited power-on current surge and no high-
current transition period, both of which occur on many
FPGAs.
IGLOO
devices
also
have
low
dynamic
power
consumption to further maximize power savings; power
is even further reduced by the use of a 1.2 V core
voltage.
Low dynamic power consumption, combined with low
static power consumption and Flash*Freeze technology,
gives the IGLOO device the lowest total system power
offered by any FPGA.
Security
The nonvolatile, flash-based IGLOO devices do not
require a boot PROM, so there is no vulnerable external
bitstream that can be easily copied. IGLOO devices
incorporate
FlashLock,
which
provides
a
unique
combination of reprogrammability and design security
without external overhead, advantages that only an
FPGA with nonvolatile flash programming can offer.
IGLOO devices utilize a 128-bit flash-based lock and a
separate AES key to secure programmed intellectual
property and configuration data. In addition, all
FlashROM data in IGLOO devices can be encrypted prior
to loading, using the industry-leading AES-128 (FIPS192)
bit block cipher encryption standard. The AES standard
was adopted by the National Institute of Standards and
Technology (NIST) in 2000 and replaces the 1977 DES
standard. IGLOO devices have a built-in AES decryption
engine and a flash-based AES key that make them the
most comprehensive programmable logic device security
solution available today. IGLOO devices with AES-based
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AGL10005-FG484 | FPGA, 1000000 GATES, 250 MHz, PBGA484 |
| AGL10005-FGG144I | FPGA, 1000000 GATES, 250 MHz, PBGA144 |
| AGL10005-FGG144 | FPGA, 1000000 GATES, 250 MHz, PBGA144 |
| AGL10005-FGG256I | FPGA, 1000000 GATES, 250 MHz, PBGA144 |
| AGL10005-FGG256 | FPGA, 1000000 GATES, 250 MHz, PBGA144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGL1000V2-CS144 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL1000V2-CS144ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL1000V2-CS144I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL1000V2-CS144PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL1000V2-CS281 | 功能描述:IC FPGA 1KB FLASH 1M 281-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
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