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參數(shù)資料
| 型號： | AGL125-CS196I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 125000 GATES, PBGA196 |
| 封裝： | 8 X 8 MM, 0.50 MM PITCH, CSP-196 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 234K |
| 代理商： | AGL125-CS196I |
May 2007
1
2007 Actel Corporation
See the Actel website for the latest version of the datasheet.
Prod uct Brief
IGLOOTM Low Power Flash FPGAs with
Flash*FreezeTM Technology
Features and Benefits
Low Power
5 W Power Consumption in Flash*Freeze Mode
1.2 V or 1.5 V Core Voltage for Low Power
Supports Single-Voltage System Operation
Low Power Active Capability Enables Active FPGA
Operation with Ultra-Low Power (from 25 W)
Flash*Freeze Technology Enables Ultra-Low Power
Consumption While Maintaining FPGA Content
Quick and Easy Way to Enter and Exit Flash*Freeze
Mode Using Flash*Freeze Pin
High Capacity
30 k to 1 Million System Gates
Up to 144 kbits of True Dual-Port SRAM
Up to 300 User I/Os
Reprogrammable Flash Technology
130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS
Process
Live At Power-Up (LAPU) Level 0 Support
Single-Chip Solution
Retains Programmed Design When Powered Off
In-System Programming (ISP) and Security
Secure ISP Using On-Chip 128-Bit Advanced Encryption
Standard (AES) Decryption (except AGL030) via JTAG
(IEEE 1532-compliant)
FlashLock to Secure FPGA Contents
High-Performance Routing Hierarchy
Segmented, Hierarchical Routing and Clock Structure
High-Performance, Low-Skew Global Network
Architecture Supports Ultra-High Utilization
Advanced I/O
700 Mbps DDR, LVDS-Capable I/Os (AGL250 and above)
1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
Bank-Selectable I/O Voltages—Up to 4 Banks per Chip
Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V/
2.5 V/1.8 V/1.5 V,3.3 V PCI/3.3 V PCI-X (except
AGL030), and LVCMOS 2.5 V/5.0 V Input
Differential I/O Standards: LVPECL, LVDS, BLVDS, and
M-LVDS (AGL250 and above)
I/O Registers on Input, Output, and Enable Paths
Hot-Swappable and Cold Sparing I/Os (AGL030 only)
Programmable Output Slew Rate (except AGL030) and
Drive Strength
Weak Pull-Up/Down
IEEE 1149.1 (JTAG) Boundary Scan Test
Pin-Compatible Packages Across the IGLOO Family
Clock Conditioning Circuit (CCC) and PLL (except
AGL030)
Six CCC Blocks, One with an Integrated PLL
Flexible
Phase-Shift,
Multiply/Divide,
and
Delay
Capabilities
Wide Input Frequency Range (1.5 MHz to 200 MHz)
Embedded Memory
1 kbit of FlashROM User Nonvolatile Memory
SRAMs and FIFOs with Variable-Aspect Ratio 4,608-Bit
RAM Blocks (x1, x2, x4, x9, and x18 organizations
available)
True Dual-Port SRAM (except x18)
Table 1
IGLOO Product Family
IGLOO Devices
AGL030
AGL060
AGL125
AGL250
AGL600
AGL1000
System Gates
30 k
60 k
125 k
250 k
600 k
1 M
VersaTiles (D-Flip-Flops)
768
1,536
3,072
6,144
13,824
24,576
Quiescent
Current
(typical)
in
Flash*Freeze Mode (A)
4
8
14
28
60
102
RAM kbits (1,024 bits)
–
18
36
108
144
4,608 Bit Blocks
–4
8
24
32
FlashROM Bits
1 k
Secure (AES) ISP
–
Yes
Integrated PLL in CCCs
–1
1
VersaNet Globals1
618
18
I/O Banks
22
2
4
Maximum User I/Os
81
96
133
143
235
300
Package Pins
CS
QFN
VQFP
FBGA
QN132
VQ100
CS196
QN132
VQ100
FG144
CS196
QN132
VQ100
FG144
CS196
QN132
VQ100
FG144
FG144, FG256,
FG484
FG144, FG256,
FG484
Notes:
1. Six chip (main) and three quadrant global networks are available for AGL060 and above.
2. For higher densities and support of additional features, refer to the IGLOOe Flash FPGAs datasheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AGL125-CS196 | FPGA, 125000 GATES, PBGA196 |
| AGL125-CSG196I | FPGA, 125000 GATES, PBGA196 |
| AGL125-CSG196 | FPGA, 125000 GATES, PBGA196 |
| AGL125-FCS196 | FPGA, 125000 GATES, PBGA196 |
| AGL125-FCSG196 | FPGA, 125000 GATES, PBGA196 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGL125V2-CS144 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS144PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO Low-Power Flash FPGAs with Flash Freeze Technology |
| AGL125V2-CS196 | 功能描述:IC FPGA 1KB FLASH 125K 196-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
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