2-28 Revision 13 Detailed I/O DC Characteristics Table 2-27 Input Capacitance Symbol Definition Co" />
參數(shù)資料
型號: AGLE600V2-FG256
廠商: Microsemi SoC
文件頁數(shù): 104/166頁
文件大小: 0K
描述: IC FPGA 1KB FLASH 600K 256-FBGA
標準包裝: 90
系列: IGLOOe
邏輯元件/單元數(shù): 13824
RAM 位總計: 110592
輸入/輸出數(shù): 165
門數(shù): 600000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 256-LBGA
供應商設備封裝: 256-FPBGA(17x17)
IGLOOe DC and Switching Characteristics
2-28
Revision 13
Detailed I/O DC Characteristics
Table 2-27 Input Capacitance
Symbol
Definition
Conditions
Min.
Max.
Units
CIN
Input capacitance
VIN = 0, f = 1.0 MHz
8
pF
CINCLK
Input capacitance on the clock pin
VIN = 0, f = 1.0 MHz
8
pF
Table 2-28 I/O Output Buffer Maximum Resistances1
Standard
Drive Strength
RPULL-DOWN ()2
RPULL-UP ()3
3.3 V LVTTL / 3.3 V LVCMOS
4 mA
100
300
8 mA
50
150
12 mA
25
75
16 mA
17
50
24 mA
11
33
3.3 V LVCMOS Wide Range
100 A
Same as regular
3.3 V LVCMOS
Same as regular
3.3 V LVCMOS
2.5 V LVCMOS
4 mA
100
200
8 mA
50
100
12 mA
25
50
16 mA
20
40
24 mA
11
22
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
6 mA
50
56
8 mA
50
56
12 mA
20
22
16 mA
20
22
1.5 V LVCMOS
2 mA
200
224
4 mA
100
112
6 mA
67
75
8 mA
33
37
12 mA
33
37
1.2 V LVCMOS4
2 mA
158
164
1.2 V LVCMOS Wide Range4
100 A
Same as regular
1.2 V LVCMOS
Same as regular
1.2 V LVCMOS
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located on the Microsemi SoC Products Group website at
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec
4. Applicable to IGLOOe V2 devices operating in the 1.2 V core range ONLY.
5. Output drive strength is below JEDEC specification.
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