參數(shù)資料
型號: AGLN015V2-FQNG68
元件分類: FPGA
英文描述: FPGA, PQCC68
封裝: 8 X 8 MM, 0.90 HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, QFN-68
文件頁數(shù): 36/114頁
文件大?。?/td> 3991K
代理商: AGLN015V2-FQNG68
IGLOO nano DC and Switching Characteristics
2- 14
Advance v0.2
Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage.
If the toggle rate of a net is 100%, this means that this net switches at half the clock frequency.
Below are some examples:
The average toggle rate of a shift register is 100% because all flip-flop outputs toggle at
half of the clock frequency.
The average toggle rate of an 8-bit counter is 25%:
Bit 0 (LSB) = 100%
Bit 1
= 50%
Bit 2
= 25%
–…
Bit 7 (MSB) = 0.78125%
Average toggle rate = (100% + 50% + 25% + 12.5% + . . . + 0.78125%) / 8
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled.
When nontristate output buffers are used, the enable rate should be 100%.
Table 2-18 Toggle Rate Guidelines Recommended for Power Calculation
Component
Definition
Guideline
α
1
Toggle rate of VersaTile outputs
10%
α
2
I/O buffer toggle rate
10%
Table 2-19 Enable Rate Guidelines Recommended for Power Calculation
Component
Definition
Guideline
β
1
I/O output buffer enable rate
100%
β
2
RAM enable rate for read operations
12.5%
β
3
RAM enable rate for write operations
12.5%
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AGLN015V2-QNG68 功能描述:IC FPGA NANO 1KB 15K 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
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