參數(shù)資料
型號: AGLN030V2-ZFUCG81
元件分類: FPGA
英文描述: FPGA, PBGA81
封裝: 4 X 4 MM, 0.80 MM HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, UCSP-81
文件頁數(shù): 28/114頁
文件大小: 3991K
代理商: AGLN030V2-ZFUCG81
IGLOO nano DC and Switching Characteristics
2- 6
A d vance v0.2
Thermal Characteristics
Introduction
The temperature variable in the Actel Designer software refers to the junction temperature, not
the ambient temperature. This is an important distinction because dynamic and static power
consumption cause the chip junction temperature to be higher than the ambient temperature.
EQ 2-1 can be used to calculate junction temperature.
TJ = Junction Temperature = T + TA
EQ 2-1
where:
TA = Ambient temperature
T = Temperature gradient between junction (silicon) and ambient T = θja * P
θja = Junction-to-ambient of the package. θja numbers are located in Figure 2-5.
P = Power dissipation
Package Thermal Characteristics
The device junction-to-case thermal resistivity is
θjc and the junction-to-ambient air thermal
resistivity is
θja. The thermal characteristics for θja are shown for two air flow rates. The maximum
operating junction temperature is 100°C. EQ 2-2 shows a sample calculation of the maximum
operating power dissipation allowed for a 484-pin FBGA package at commercial temperature and
in still air.
EQ 2-2
Temperature and Voltage Derating Factors
Maximum Power Allowed
Max. junction temp. (
° C) Max. ambient temp. (° C)
θ
ja(° C/W)
-----------------------------------------------------------------------------------------------------------------------------------------
100
° C70° C
20.5°C/W
--------------------------------------
1.46 W
=
Table 2-5
Package Thermal Resistivities
Package Type
Pin
Count
θjc
θja
Units
Still Air
200 ft./
min.
500 ft./
min.
Chip Scale Package (CSP)
36
TBD
C/W
81
TBD
C/W
Quad Flat No Lead (QFN)
48
TBD
C/W
68
TBD
C/W
100
TBD
C/W
Very Thin Quad Flat Pack (VQFP)
100
10.0
35.3
29.4
27.1
C/W
Table 2-6
Temperature and Voltage Derating Factors for Timing Delays (normalized to TJ = 70°C,
VCC =1.425 V)
For IGLOO nano V2 or V5 Devices, 1.5 V DC Core Supply Voltage
Array Voltage
VCC (V)
Junction Temperature (°C)
–40°C
–20°C
0°C
25°C
70°C
85°C
125°C
1.425
0.966
0.972
0.977
0.991
1.000
1.006
1.013
1.5
0.877
0.882
0.888
0.899
0.907
0.913
0.919
1.575
0.815
0.820
0.824
0.835
0.843
0.848
0.854
相關PDF資料
PDF描述
AGLN030V2-ZFVQ100 FPGA, PQFP100
AGLN030V2-ZFVQG100 FPGA, PQFP100
AGLN250V2-FCS81 FPGA, PBGA81
AGLN250V2-FCSG81 FPGA, PBGA81
AGLN250V2-FQN100 FPGA, PBCC100
相關代理商/技術參數(shù)
參數(shù)描述
AGLN030V2-ZQNG48 功能描述:IC FPGA NANO 1KB 30K 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
AGLN030V2-ZQNG48I 功能描述:IC FPGA NANO 1KB 30K 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
AGLN030V2-ZQNG68 功能描述:IC FPGA NANO 1KB 30K 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
AGLN030V2-ZQNG68I 功能描述:IC FPGA NANO 1KB 30K 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
AGLN030V2-ZUCG81 功能描述:IC FPGA NANO 1KB 30K 81-UCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)