參數資料
型號: AGLN125V2-ZCSG81
廠商: Microsemi SoC
文件頁數: 60/150頁
文件大?。?/td> 0K
描述: IC FPGA NANO 1KB 125K 81-CSP
標準包裝: 640
系列: IGLOO nano
邏輯元件/單元數: 3072
RAM 位總計: 36864
輸入/輸出數: 60
門數: 125000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -20°C ~ 70°C
封裝/外殼: 81-WFBGA,CSBGA
供應商設備封裝: 81-CSP(5x5)
Revision 17
2-1
2 – IGLOO nano DC and Switching Characteristics
General Specifications
The Z feature grade does not support the enhanced nano features of Schmitt trigger input, Flash*Freeze
bus hold (hold previous I/O state in Flash*Freeze mode), cold-sparing, and hot-swap I/O capability. Refer
Operating Conditions
Stresses beyond those listed in Table 2-1 may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings are stress ratings only; functional operation of the device at these or any
other conditions beyond those listed under the Recommended Operating Conditions specified in
Table 2-2 on page 2-2 is not implied.
Table 2-1
Absolute Maximum Ratings
Symbol
Parameter
Limits
Units
VCC
DC core supply voltage
–0.3 to 1.65
V
VJTAG
JTAG DC voltage
–0.3 to 3.75
V
VPUMP
Programming voltage
–0.3 to 3.75
V
VCCPLL
Analog power supply (PLL)
–0.3 to 1.65
V
VCCI
DC I/O buffer supply voltage
–0.3 to 3.75
V
VI1
I/O input voltage
–0.3 V to 3.6 V
V
TSTG 2
Storage temperature
–65 to +150
°C
TJ 2
Junction temperature
+125
°C
Notes:
1. The device should be operated within the limits specified by the datasheet. During transitions, the input signal may
undershoot or overshoot according to the limits shown in Table 2-4 on page 2-3.
2. For flash programming and retention maximum limits, refer to Table 2-3 on page 2-2, and for recommended operating
limits, refer to Table 2-2 on page 2-2.
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