2-30 Revision 17 Timing Characteristics Applies to 1.5 V DC Core Voltage Table 2-41 " />
參數(shù)資料
型號(hào): AGLN250V5-ZCSG81
廠商: Microsemi SoC
文件頁數(shù): 92/150頁
文件大?。?/td> 0K
描述: IC FPGA NANO 1KB 250K 81-CSP
標(biāo)準(zhǔn)包裝: 640
系列: IGLOO nano
邏輯元件/單元數(shù): 6144
RAM 位總計(jì): 36864
輸入/輸出數(shù): 60
門數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -20°C ~ 70°C
封裝/外殼: 81-WFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 81-CSP(5x5)
IGLOO nano DC and Switching Characteristics
2-30
Revision 17
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Table 2-41 3.3 V LVCMOS Wide Range Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ Units
100 A
2 mA
STD
0.97
5.23
0.19
1.20
1.66
0.66
5.24
5.00
2.47
2.56
ns
100 A
4 mA
STD
0.97
5.23
0.19
1.20
1.66
0.66
5.24
5.00
2.47
2.56
ns
100 A
6 mA
STD
0.97
4.27
0.19
1.20
1.66
0.66
4.28
4.12
2.83
3.16
ns
100 A
8 mA
STD
0.97
4.27
0.19
1.20
1.66
0.66
4.28
4.12
2.83
3.16
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-42 3.3 V LVCMOS Wide Range High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ Units
100 A
2 mA
STD
0.97
3.11
0.19
1.20
1.66
0.66
3.13
2.55
2.47
2.70
ns
100 A
4 mA
STD
0.97
3.11
0.19
1.20
1.66
0.66
3.13
2.55
2.47
2.70
ns
100 A
6 mA
STD
0.97
2.56
0.19
1.20
1.66
0.66
2.57
2.02
2.82
3.31
ns
100 A
8 mA
STD
0.97
2.56
0.19
1.20
1.66
0.66
2.57
2.02
2.82
3.31
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
3. Software default selection highlighted in gray.
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