5-4 Revision 16 Revision 11 (continued) The tables in the "Single-Ended I/O Characteristics" section were updated." />
參數資料
型號: AGLP030V2-VQG128
廠商: Microsemi SoC
文件頁數: 36/134頁
文件大小: 0K
描述: IC FPGA IGLOO PLUS 30K 128-VQFN
標準包裝: 90
系列: IGLOO PLUS
邏輯元件/單元數: 792
輸入/輸出數: 101
門數: 30000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 128-TQFP
供應商設備封裝: 128-VTQFP(14x14)
Datasheet Information
5-4
Revision 16
Revision 11
(continued)
The tables in the "Single-Ended I/O Characteristics" section were updated. Notes
clarifying IIL and IIH were added.
Tables for 3.3 V LVCMOS and 1.2 V LVCMOS wide range were added (SAR 79370,
SAR 79353, and SAR 79366).
Notes in the wide range tables state that the minimum drive strength for any
LVCMOS 3.3 V (or LVCMOS 1.2 V) software configuration when run in wide range is
±100 A. Drive strength displayed in the software is supported for normal range only.
For a detailed I/V curve, refer to the IBIS models (SAR 25700).
The following sentence was deleted from the "2.5 V LVCMOS" section: It uses a
5 V–tolerant input buffer and push-pull output buffer (SAR 24916).
section were updated.
through
The following tables were updated in the "Global Tree Timing Characteristics"
CCC/PLL Specification were revised (SAR 79388). VCO output jitter and maximum
peak-to-peak jitter data were changed. Three notes were added to the table in
connection with these changes.
Figure 2-28 Write Access after Write onto Same Address and Figure 2-29 Write
Access after Read onto Same Address were deleted.
N/A
sections were updated.
Revision
Changes
Page
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相關代理商/技術參數
參數描述
AGLP030V2-VQG128I 功能描述:IC FPGA IGLOO PLUS 30K 128-VQFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:IGLOO PLUS 標準包裝:152 系列:IGLOO PLUS LAB/CLB數:- 邏輯元件/單元數:792 RAM 位總計:- 輸入/輸出數:120 門數:30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應商設備封裝:289-CSP(14x14)
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