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參數(shù)資料
| 型號： | AGLP060V2VQG176 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1584 CLBS, 60000 GATES, PQFP176 |
| 封裝： | 20 X 20 MM, 1 MM HEIGHT, 0.4 MM PITCH, VQFP-176 |
| 文件頁數(shù)： | 27/128頁 |
| 文件大?。?/td> | 4383K |
| 代理商： | AGLP060V2VQG176 |
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Datasheet Information
4- 2
R ev isio n 1 1
Revision 11 (continued) The values in the following tables were updated. 3.3 V LVCMOS and 1.2 V
LVCMOS wide range were added to the tables where applicable.
A table note was added to Table 2-16 Different Components Contributing to the
Devices stating the value for PDC4 is the minimum contribution of the PLL when
operating at lowest frequency.
2-11,
Table 2-29 I/O Weak Pull-Up/Pull-Down Resistances was revised, including
addition of 3.3 V and 1.2 V LVCMOS wide range. The notes defining RWEAK PULL-
UP-MAX and RWEAK PULLDOWN-MAX were revised (SAR 21348).
Table 2-30 I/O Short Currents IOSH/IOSL was revised to include data for 3.3 V
and 1.2 V LVCMOS wide range (SAR 79353 and SAR 79366).
Table 2-31 Duration of Short Circuit Event before Failure was revised to change
the maximum temperature from 110°C to 100°C, with an example of six months
instead of three months (SAR 26259).
The tables in the "Single-Ended I/O Characteristics" section were updated. Notes
clarifying IIL and IIH were added.
Tables for 3.3 V LVCMOS and 1.2 V LVCMOS wide range were added (SAR
79370,
SAR 79353, and SAR 79366).
Notes in the wide range tables state that the minimum drive strength for any
LVCMOS 3.3 V (or LVCMOS 1.2 V) software configuration when run in wide
range is ±100 A. Drive strength displayed in the software is supported for
normal range only. For a detailed I/V curve, refer to the IBIS models (SAR
25700).
The following sentence was deleted from the "2.5 V LVCMOS" section: It uses a
5 V–tolerant input buffer and push-pull output buffer (SAR 24916).
Enable Register" section were updated. The tables in the
Characteristics" section were updated.
through
Revision
Changes
Page
相關(guān)PDF資料 |
PDF描述 |
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| AGLP060V5-CS201I | FPGA, 1584 CLBS, 60000 GATES, PBGA201 |
| AGLP060V5-CS201 | FPGA, 1584 CLBS, 60000 GATES, PBGA201 |
| AGLP060V5-CS289I | FPGA, 1584 CLBS, 60000 GATES, PBGA289 |
| AGLP060V5-CS289 | FPGA, 1584 CLBS, 60000 GATES, PBGA289 |
| AGLP060V5-CSG201I | FPGA, 1584 CLBS, 60000 GATES, PBGA201 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AGLP060V2-VQG176 | 功能描述:IC FPGA IGLOO PLUS 60K 176-VQFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLP060V2-VQG176ES | 制造商:Microsemi Corporation 功能描述:FPGA IGLOO PLUS FAMILY 60K GATES 512 CELLS 526.32MHZ/892.86M - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA IGLOO PLUS FAMILY 60K GATES 512 CELLS 526.32MHZ/892.86M - Trays |
| AGLP060V2-VQG176I | 功能描述:IC FPGA IGLOO PLUS 60K 176-VQFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| AGLP060-V2VQG289 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
| AGLP060-V2VQG289ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
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