參數(shù)資料
型號: AGLP060V5-VQ176I
元件分類: FPGA
英文描述: FPGA, 1584 CLBS, 60000 GATES, PQFP176
封裝: 20 X 20 MM, 1 MM HEIGHT, 0.4 MM PITCH, ROHS COMPLIANT, VQFP-176
文件頁數(shù): 79/128頁
文件大?。?/td> 4383K
代理商: AGLP060V5-VQ176I
IGLOO PLUS DC and Switching Characteristics
2- 40
R e v i sio n 1 1
Timing Characteristics
Applies to 1.2 V DC Core Voltage
Table 2-70 1.2 V LVCMOS Wide Range Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
100 A
2 mA
STD
0.98
8.27
0.19
1.57
2.34
0.67
7.94
6.77
3.00
3.11
ns
Notes:
1. The minimum drive strength for any LVCMOS 1.2 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-71 1.2 V LVCMOS Wide Range High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.14 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
100 A
2 mA
STD
0.98
3.38
0.19
1.57
2.34
0.67
3.26
2.78
2.99
3.24
ns
Notes:
1. The minimum drive strength for any LVCMOS 1.2 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
3. Software default selection highlighted in gray.
相關(guān)PDF資料
PDF描述
AGLP060V5-VQ176 FPGA, 1584 CLBS, 60000 GATES, PQFP176
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