參數(shù)資料
型號： AGLP125V5-CSG281
元件分類： FPGA
英文描述： FPGA, 3120 CLBS, 125000 GATES, PBGA281
封裝： 10 X 10 MM, 1.05 MM HEIGHT, 0.5 MM PITCH, ROHS COMPLIANT, CSP-281
文件頁數(shù)： 2/128頁
文件大?。?/td> 4383K
代理商： AGLP125V5-CSG281
IGLOO PLUS Device Family Overview
1- 4
R ev isio n 1 1
Flash*Freeze Technology
The IGLOO PLUS device has an ultra-low power static mode, called Flash*Freeze mode, which retains
all SRAM and register information and can still quickly return to normal operation. Flash*Freeze
technology enables the user to quickly (within 1 s) enter and exit Flash*Freeze mode by activating the
Flash*Freeze pin while all power supplies are kept at their original values. In addition, I/Os and global
I/Os can still be driven and can be toggling without impact on power consumption, clocks can still be
driven or can be toggling without impact on power consumption, and the device retains all core registers,
SRAM information, and I/O states. I/Os can be individually configured to either hold their previous state
or be tristated during Flash*Freeze mode. Alternatively, they can be set to a certain state using weak pull-
up or pull-down I/O attribute configuration. No power is consumed by the I/O banks, clocks, JTAG pins,
or PLL, and the device consumes as little as 5 W in this mode.
Flash*Freeze technology allows the user to switch to Active mode on demand, thus simplifying the power
management of the device.
The Flash*Freeze pin (active low) can be routed internally to the core to allow the user's logic to decide
when it is safe to transition to this mode. Refer to Figure 1-2 for an illustration of entering/exiting
Flash*Freeze mode. It is also possible to use the Flash*Freeze pin as a regular I/O if Flash*Freeze mode
usage is not planned.
* Not supported by AGLP030 devices
Figure 1-1
IGLOO PLUS Device Architecture Overview with Four I/O Banks (AGLP030, AGLP060, and
AGLP125)
RAM Block
4,608-Bit Dual-Port
SRAM or FIFO Block*
VersaTile
CCC
I/Os
ISP AES
Decryption*
User Nonvolatile
FlashRom
Flash*Freeze
Technology
Charge
Pumps
Bank 0
Bank
1
Bank
1
Bank
3
Bank
3
Bank 2
*
Figure 1-2
IGLOO PLUS Flash*Freeze Mode
Actel
IGLOO PLUS
FPGA
Flash*Freeze
Mode Control
Flash*Freeze Pin
相關PDF資料
PDF描述
AGLP125V5-CSG289I FPGA, 3120 CLBS, 125000 GATES, PBGA289
AGLP125V5-CSG289 FPGA, 3120 CLBS, 125000 GATES, PBGA289
AGLP125V5CS281I FPGA, 3120 CLBS, 125000 GATES, PBGA281
AGLP125V5CS281 FPGA, 3120 CLBS, 125000 GATES, PBGA281
AGLP125V5CS289I FPGA, 3120 CLBS, 125000 GATES, PBGA289
相關代理商/技術參數(shù)
參數(shù)描述
AGLP125V5-CSG281I 功能描述:IC FPGA IGLOO PLUS 125K 281-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA（17x17）
AGLP125-V5CSG289 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125V5-CSG289 功能描述:IC FPGA IGLOO PLUS 125K 289-CSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOO PLUS 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應商設備封裝:289-CSP（14x14）
AGLP125-V5CSG289ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP125-V5CSG289I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
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