參數(shù)資料
型號(hào): AK4104ET
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO16
封裝: 0.65 MM PITCH, LEAD FREE, TSSOP-16
文件頁數(shù): 7/20頁
文件大小: 503K
代理商: AK4104ET
[AK4104]
2.3-wire
μP I/F mode (MODE bit = “1”)
Internal registers may be written by 3-wire P interface pins, CSN, CCLK and CDTI. The data on this interface consists
of Chip Address (2bits, C1/0; fixed to “11”), Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first,
5bits) and Control Data (MSB first, 8bits). The AK4104 latches the data on the rising edge of CCLK, so data should
clocked in on the falling edge. The writing of data becomes valid by 16th CCLK after a high to low transition of CSN.
CSN should be set to “H” once after the 16th CCLK. The clock speed of CCLK is 5MHz (max).
PDN pin = “L” resets the registers to their default values. The internal timing circuit is reset by RSTN bit, but the registers
are not initialized.
CDTI
CCLK
CSN
C1
0
12
3
4
56
7
8
9
10
11
12
13
14
15
D4
D5
D6
D7
A1
A2
A3
A4
R/W
C0
A0
D0
D1
D2
D3
C1-C0: Chip Address (Fixed to “11”)
R/W:
READ/WRITE (Fixed to “1”, Write only)
A4-A0: Register Address
D7-D0: Control Data
Figure 18. 3-wire
μP I/F Timing
*The AK4104 does not support the read command and chip address. C1/0 and R/W are fixed to “011”
*When the AK4104 is in the power down mode (PDN pin = “L”) or the MCLK is not provided, writing into the control
register is inhibited.
MS0642-E-00
2007/07
- 15 -
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