參數(shù)資料
型號(hào)： AK4112B
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： HIGH FEATURE 96kHz 24BIT DIR
中文描述： 特寫(xiě)96kHz的24位高迪爾
文件頁(yè)數(shù)： 30/30頁(yè)
文件大?。?/td> 334K
代理商： AK4112B
ASAHI KASEI
[AK4112B]
MS0078-E-02
2004/04
- 9 -
OPERATION OVERVIEW
Non-PCM (AC-3, MPEG, etc.) Stream Detect
The AK4112B has a Non-PCM steam auto detect function. When the 32bit mode Non-PCM preamble based on Dolby
“AC-3 Data Stream in IEC958 Interface” is detected, the AUTO goes “H”. The 96bit sync code consists of 0x0000,
0x0000, 0x0000, 0x0000, 0xF872 and 0x4E1F. Detection of this pattern will set the AUTO “H”. Once the AUTO is set
“H”, it will remain “H” until 4096 frames pass through the chip without additional sync pattern being detected. When
those preambles are detected, the burst preambles Pc and Pd that follow those sync codes are stored to registers
0DH-10H.
Clock Recovery and 96kHz Detect
On chip low jitter PLL has a wide lock range with 22kHz to 108kHz and the lock time is less than 20ms. The 96kHz
detect output pin FS96 goes “H” when the sampling rate is 88.2kHz or more and “L” at 54kHz or less. In X’tal Mode, the
FS96 pin outputs the value which is set by XFS96. PLL loses lock when the received sync interval is incorrect.
Master Clock
The AK4112B has two clock outputs, MCKO1 and MCKO2. These clocks are derived from either the recovered clock or
from the X'tal oscillator. The frequencies of the master clock outputs (MCKO1 & MCKO2) are set by OCKS0 and
OCKS1 as shown in Table 1. 96kHz sampling is not supported at No.2.
No.
OCKS1
OCKS0
MCKO1
MCKO2
X’tal
fs (kHz)
0
256fs
32, 44.1, 48, 96
Default
1
0
1
256fs
128fs
256fs
32, 44.1, 48, 96
2
1
0
512fs
256fs
512fs
32, 44.1, 48
3
1
Test Mode
Table 1. Master clock frequencies select
Clock Operation Mode
The CM0 and CM1 select the clock source of MCKO1/2 and the data source of SDTO via the dedicated pins or the
control register. In Mode 2, the clock source is switched from PLL to X'tal when PLL goes unlock state. In Mode3, the
clock source is fixed to X'tal, but PLL is also operating and the recovered data such as C bits can be monitored.
Mode
CM1
CM0
UNLOCK
PLL
X'tal
Clock source
FS96
SDTO
0
-
ON
OFF
PLL
RFS96
RX
Default
1
0
1
-
OFF
ON
X'tal
XFS96
DAUX
0
ON
PLL
RFS96
RX
2
1
0
1
ON
X'tal
XFS96
DAUX
3
1
-
ON
X'tal
XFS96
DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-down)
Table 2. Clock Operation Mode select
相關(guān)PDF資料
PDF描述
AK4181AVT TOUCH SCREEN CONTROLLER
AK4181A TOUCH SCREEN CONTROLLER
AK4201EU 0.065 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO12
AK4367 OUTPUT MIXER & HP - AMP 24 BIT 2 CH DAC
AK4532-E2 SPECIALTY CONSUMER CIRCUIT, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4112B_12 制造商:AKM 制造商全稱:AKM 功能描述:High Feature 96kHz 24bit DIR
AK4112BVF 功能描述:IC RCVR DGTL AUD QUAD 28VSOP 制造商:akm semiconductor inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過(guò)期 功能:音頻接收器 應(yīng)用:數(shù)字音頻接口 通道數(shù):4 接口:I2S 電壓 - 電源:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C（TA） 規(guī)格:22kHz ~ 108kHz 封裝/外殼:28-LSSOP（0.220"，5.60mm 寬） 供應(yīng)商器件封裝:28-VSOP 標(biāo)準(zhǔn)包裝:1
AK4112BVFP 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:HIGH FEATURE 96KHZ 24-BIT DIR
AK4112BVFP-E2 功能描述:IC RCVR DGTL AUD QUAD 28VSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
AK4112BVM 制造商:AKM 制造商全稱:AKM 功能描述:High Feature 96kHz 24bit DIR
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*