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ASAHI KASEI
[AK9822/24]
DAD01E-00
1999/05
- 13 -
AC characteristics
1)EEPROM section
(VCC=+1.8V
~
5.5V, GND=0V, Ta=-40
~
+85
°
C unless otherwise specified )
Parameter
Symbol
Conditions
min
max
Units
SK cycle
tSKP1
tSKP2
(note6),(note7)
(note8)
500
1.5
ns
us
SK pulse width
tSKW1
tSKW2
(note6),(note7)
(note8)
250
750
ns
ns
SK pulse high level width
(note10)
tSKH1
tSKH2
tSKH3
(note6)
(note7)
(note8)
250
500
750
ns
ns
ns
CS setup time
tCSS
100
ns
tCSH1
READ
WREN, WRDS
PDEN, PDDS
100
ns
CS hold time
tCSH2
CALL
WRITE (note9)
2
us
SK setup time
tSKS
100
ns
Data setup time
tDIS1
tDIS2
tDIS3
(note6)
(note7)
(note8)
100
150
200
ns
ns
ns
data hold time
tDIH1
tDIH2
tDIH3
(note6)
(note7)
(note8)
100
150
200
ns
ns
ns
DO pin output delay
(note11), (note13)
tPD1
tPD2
tPD3
(note6)
(note7)
(note8)
150
250
500
ns
ns
ns
Selftimed program time
tE/W
10
ms
Write recovery time
tRC
100
ns
Min. CS high time (note12)
DO pin high-Z time
note6.
note7.
note8.
note9.
tCS
tOZ
250
ns
ns
500
4.0V
≤
VCC
≤
5.5V
2.5V
≤
VCC<4.0V
1.8V
≤
VCC<2.5V
In case of the following case, tCSH is min.100ns.
The WRITE instruction by which the address "0" is specified is executed at the WRITE
enable state.
The WRITE instruction by which the address "1
~
127/255" is specified is executed.
note10. The tSKH is the high pulse width of 16th SK pulse in READ operation. When the
data in the next address are read sequentially by continuing to provide clock, tSKH are
applied to the high pulse width of 32nd and 48th (multiple of 16) SK pulse in READ
operation.
note11. In case that Ready/Busy signal output, tPD is min.1us.
note12. The first CS high time is the tACS after Vcc is applied to the part.
note13. CL=100pF