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參數(shù)資料
| 型號(hào)： | ALD500RA-20SEL |
| 廠商： | Advanced Linear Devices Inc |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 17BIT 20SOIC |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 位數(shù)： | 17 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 10mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 管件 |
| 輸入數(shù)目和類(lèi)型： | * |
ALD500RAU/ALD500RA/ALD500R
Advanced Linear Devices
3
e. Very high resolution, high accuracy measurements
can be achieved simply and at very low cost.
An inherent benefit of the dual slope converter system is noise
immunity. The input noise spikes are integrated (averaged to
near zero) during the integration periods. Integrating ADCs
are immune to the large conversion errors that plague
successive approximation converters and other high resolution
converters and perform very well in high-noise environments.
The slow conversion speed of the integrating converter provides
inherent noise rejection with at least a 20dB/decade attenuation
rate. Interference signals with frequencies at integral multiples
of the integration period are, theoretically, completely removed.
Integrating converters often establish the integration period to
reject 50/60Hz line frequency interference signals.
The relationship of the integrate and deintegrate (charge
and discharge) of the integrating capacitor values are
shown below:
VINT = VX - (VIN . tINT / RINT . CINT)
(integrate cycle)
(1)
VX = VINT - (VREF . tDINT / RINT . CINT)
(deintegrate cycle)
(2)
Combining equations 1 and 2 results in:
VIN / VREF = -tDINT / tINT
(3)
where:
Vx
= An offset voltage used as starting voltage
VINT = Voltage change across CINT during tINT and
during tDINT (equal in magnitude)
VIN = Average, or an integrated, value of input voltage
to be measured during tINT (Constant VIN)
tINT = Fixed time period over which unknown voltage is
integrated
tDINT = Unknown time period over which a known
Figure 2. Basic Dual-Slope Converter
reference voltage is integrated
VREF = Reference Voltage
CINT = Integrating Capacitor value
RINT = Integrating Resistor value
Actual data conversion is accomplished in two phases: Input
Signal Integration Phase and Reference Voltage Deintegration
Phase.
The integrator output is initialized to 0V prior to the start of
Input Signal Integration Phase. During Input Signal Integration
Phase, internal analog switches connect VIN to the buffer
input where it is maintained for a fixed integration time period
(tINT). This fixed integration period is generally determined by
a digital counter
controlled by a crystal oscillator. The
application of VIN causes the integrator output to depart 0V at
a rate determined by VIN and a direction determined by the
polarity of VIN.
The Reference Voltage Deintegration Phase is initiated
immediately after tINT, within 1 clock cycle.
During
ReferenceVoltage Deintegration Phase, internal analog
switches connect a reference voltage having a polarity opposite
that of VIN to the integrator input. Simultaneously the same
digital counter controlled by the same crystal oscillator used
above is used to start counting clock pulses. The Reference
Voltage Deintegration Phase is maintained until the comparator
output inside the dual slope analog processor changes state,
indicating the integrator has returned to 0V. At that point the
digital counter is stopped. The Deintegration time period
(tDINT), as measured by the digital counter, is directly
proportional to the magnitude of the applied input voltage.
After the digital counter value has been read, the digital
counter, the integrator, and the auto zero capacitor are all
reset to zero through an Integrator Zero Phase and an Auto
Zero Phase so that the next conversion can begin again. In
practice, this process is usually automated so that analog-to-
digital conversion is continuously updated. The digital control
is handled by a microprocessor or a dedicated logic controller.
The output, in the form of a binary serial word, is read by a
microprocessor or a display adapter when desired.
S1
CINT
VINT
RINT
SWITCH DRIVER
CONTROL
LOGIC
POLARITY CONTROL
REF
SWITCHES
INTEGRATOR
COMPARATOR
PHASE
CONTROL
ANALOG
INPUT
(VIN)
OUTPUT
INTEGRATOR
VIN
≈ VFULL SCALE
VIN
≈ 1/2VFULL SCALE
tINT
tDINT
VINT = 4.1V MAX
AB
+
-
MICROCONTROLLER
(CONTROL LOGIC
+ COUNTER)
VOLTAGE
REFERENCE
COUT
POLARITY
DETECTION
Vx ≈ 0
tDINT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ALD500RAU | 制造商:ALD 制造商全稱(chēng):Advanced Linear Devices 功能描述:PRECISION INTEGRATING ANALOG PROCESSOR WITH PRECISION VOLTAGE REFERENCE |
| ALD500RAU-10PE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bt A/D w10 ppm VR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ALD500RAU-10PEL | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bt A/D w10 ppm VR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ALD500RAU-10QE | 制造商:ALD 制造商全稱(chēng):Advanced Linear Devices 功能描述:PRECISION INTEGRATING ANALOG PROCESSOR WITH PRECISION VOLTAGE REFERENCE |
| ALD500RAU-10QEL | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bit A/D w10ppm VR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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