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參數(shù)資料
| 型號： | Am27C1024-70DE5 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 1 Megabit (65 K x 16-Bit) CMOS EPROM |
| 中文描述： | 1兆位（65畝× 16位）的CMOS存儲器 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 173K |
| 代理商： | AM27C1024-70DE5 |
6
Am27C1024
connection to all devices in the array and connected to
the READ line from the system control bus. This as-
sures that all deselected memory devices are in their
low-power standby mode and that the output pins are
only active when data is desired from a particular mem-
ory device.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 μF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
V
CC
and V
SS
to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7 μF bulk electrolytic capacitor should be used
between V
CC
and V
SS
for each eight devices. The loca-
tion of the capacitor should be close to where the
power supply is connected to the array.
MODE SELECT TABLE
Notes:
1. V
H
= 12.0 V
±
0.5 V.
2. X = Either V
IH
or V
IL
.
3.
A1–A8 and A10–15 = V
IL
4. See DC Programming Characteristics for V
PP
voltage during programming.
Mode
CE#
OE#
PGM#
A0
A9
V
PP
Outputs
Read
V
IL
V
IL
X
X
X
X
D
OUT
Output Disable
X
V
IH
X
X
X
X
High Z
Standby (TTL)
V
IH
X
X
X
X
X
High Z
Standby (CMOS)
V
CC
±
0.3 V
X
X
X
X
X
High Z
Program
V
IL
X
V
IL
X
X
V
PP
D
IN
Program Verify
V
IL
V
IL
V
IH
X
X
V
PP
D
OUT
Program Inhibit
V
IH
X
X
X
X
V
PP
High Z
Autoselect
(Note 3)
Manufacturer Code
V
IL
V
IL
V
IH
V
IL
V
H
X
01h
Device Code
V
IL
V
IL
V
IH
V
IH
V
H
X
8Ch
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