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參數(shù)資料
| 型號(hào)： | Am27C2048-70DC5 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 2 Megabit (128 K x 16-Bit) CMOS EPROM |
| 中文描述： | 2兆位（128畝× 16位）的CMOS存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大小： | 173K |
| 代理商： | AM27C2048-70DC5 |
Am27C2048
9
TEST CONDITIONS
Table 1.
Test Specifications
SWITCHING TEST WAVEFORM
KEY TO SWITCHING WAVEFORMS
2.7 k
C
L
6.2 k
5.0 V
Device
Under
Test
11407G-7
Figure 3.
Test Setup
Note:
Diodes are IN3064 or equivalents.
Test Condition
-55
All
others
Unit
Output Load
1 TTL gate
Output Load Capacitance, C
L
(including jig capacitance)
30
100
pF
Input Rise and Fall Times
≤
20
ns
Input Pulse Levels
0.0–3.0
0.45–2.4
V
Input timing measurement
reference levels
1.5
0.8, 2.0
V
Output timing measurement
reference levels
1.5
0.8, 2.0
V
2.4 V
0.45 V
Input
Output
Test Points
2.0 V
2.0 V
0.8 V
0.8 V
11407G-8
3 V
0 V
Input
Output
1.5 V
1.5 V
Test Points
Note:
For C
L
= 100 pF
Note:
For C
L
= 30 pF
KS000010-PAL
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
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