參數(shù)資料
型號: AM28F512-70EEB
廠商: Advanced Micro Devices, Inc.
英文描述: Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-SO 0 to 70
中文描述: 512千比特(64畝× 8位)的CMOS 12.0伏,整體擦除閃存
文件頁數(shù): 16/35頁
文件大小: 484K
代理商: AM28F512-70EEB
16
Am28F512
Figure 3.
Flashrite
Programming Algorithm
Start
Apply V
PPH
PLSCNT = 0
Write Program Setup Command
Write Program Command (A/D)
Time out 10 μs
Write Program Verify Command
Time out 6 μs
Read Data from Device
Last Address
Write Reset Command
Apply V
PPL
Programming Completed
PLSCNT =
25
Increment Address
Apply V
PPL
Device Failed
No
11559G-8
Yes
Yes
No
No
Verify Byte
Increment PLSCNT
Yes
相關(guān)PDF資料
PDF描述
AM28F512-70EI Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-SO 0 to 70
AM28F512-70EIB Quad bistable latches 16-SOIC 0 to 70
AM28F512-70FC 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
AM28F512-70FCB 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
AM28F512-70FE 512 Kilobit (64 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
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