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參數(shù)資料
| 型號： | AM29BDD160GB54DKK |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 512K X 32 FLASH 2.7V PROM, 54 ns, PQFP80 |
| 封裝： | LEAD FREE, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 41/80頁 |
| 文件大?。?/td> | 3476K |
| 代理商： | AM29BDD160GB54DKK |
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44
Am29BDD160G
Legend:
BA = Address of the bank that is being switched to autose-
lect mode, is in bypass mode, or is being erased. Deter-
mined by A18 and A17, see Tables 11 and 12 for more
detail.
PA = Program Address (A18:A0). Addresses latch on the
falling edge of the WE# or CE# pulse, whichever hap-
pens later
PD = Program Data (DQ31:DQ0) written to location PA.
Data latches on the rising edge of WE# or CE# pulse,
whichever happens first.
RA = Read Address (A18:A0).
RD = Read Data (DQ31:DQ0) from location RA.
SA = Sector Address (A18:A11) for verifying (in autoselect
mode), erasing, or applying security commands.
WD = Write Data. See “Configuration Register” definition
X= Don’t care
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles
are write operations.
4. During unlock cycles, (lower address bits are 555 or
2AAh as shown in table) address bits higher than A11
(except where BA is required) and data bits higher than
DQ7 are don’t cares.
Table 19. Memory Array Command Definitions (x32 Mode)
Command (Notes)
Cycles
Bus Cycles (Notes 1–4)
First
Second
Third
Fourth
Fifth
Sixth
Addr Data Addr Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (5)
1
RA
RD
Reset (6)
1
XXX
F0
Autoselec
t (7)
Manufactur
er ID
4
555
AA
2AA
55
555
90
(BA)X0
0
01
Device ID
(11)
6
555
AA
2AA
55
555
90
(BA)X0
1
7E
(BA)X0E
08
(BA)X0F
00/
01
Program
4
555
AA
2AA
55
555
A0
PA
PD
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Sector Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Program/Erase
Suspend (12)
1
BA
B0
Program/Erase Resume
(13)
1
BA
30
CFI Query (14, 15)
1
55
98
Accelerated Program
(16)
2
XX
A0
PA
PD
Configuration Register
Verify (15)
3
555
AA
2AA
55
(BA)55
5
C6
(BA)XX
RD
Configuration Register
Write (17)
4
555
AA
2AA
55
555
D0
XX
WD
Unlock Bypass Entry
(18)
3
555
AA
2AA
55
555
20
Unlock Bypass Program
(18)
2
XX
A0
PA
PD
Unlock Bypass Erase
(18)
2
XX
80
XX
10
Unlock Bypass CFI (14,
18)
1
XX
98
Unlock Bypass Reset
(18)
2
XX
90
XX
00
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