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參數(shù)資料
| 型號： | AM29DL640H90WHEN |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| 中文描述： | 64兆位（8米× 8位/ 4米x 16位），3.0伏的CMOS只，同步讀/寫閃存 |
| 文件頁數(shù)： | 29/54頁 |
| 文件大?。?/td> | 880K |
| 代理商： | AM29DL640H90WHEN |
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February 9, 2005
Am29DL640H
27
Table 12.
Am29DL640H Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A21–A12 uniquely select any sector. Refer to
Table 2 for information on sector addresses.
BA = Address of the bank that is being switched to autoselect mode, is
in bypass mode, or is being erased. A21–A19 uniquely select a bank.
Notes:
1.
2.
3.
See Table 1 for description of bus operations.
All values are in hexadecimal.
Except for the read cycle and the fourth, fifth, and sixth cycle of
the autoselect command sequence, all bus cycles are write
cycles.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
Unless otherwise noted, address bits A21–A11 are don’t cares for
unlock and command cycles, unless SA or PA is required.
No unlock or command cycles required when bank is reading
array data.
The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when a bank is in the autoselect mode, or if DQ5 goes high (while
the bank is providing status information).
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or Secured Silicon Sector factory
protect information. Data bits DQ15–DQ8 are don’t care. While
reading the autoselect addresses, the bank address must be the
same until a reset command is given. See the Autoselect
Command Sequence section for more information.
4.
5.
6.
7.
8.
9.
The device ID must be read across the fourth, fifth, and sixth
cycles.
10. The data is 81h for factory locked, 40h for customer locked, and
01h for not factory/customer locked.
11. The data is 00h for an unprotected sector/sector block and 01h for
a protected sector/sector block.
12. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
13. The Unlock Bypass Reset command is required to return to the
read mode when the bank is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
16. Command is valid when device is ready to read array data or when
device is in autoselect mode.
Command
Sequence
(Note 1)
C
1
1
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Addr
Fifth
Sixth
Addr
RA
XXX
555
AAA
555
AAA
555
Data
RD
F0
Data
Data
Addr
Data
Addr
Data
Read (Note 6)
Reset (Note 7)
A
Manufacturer ID
Word
Byte
Word
Byte
Word
4
AA
2AA
555
2AA
555
2AA
55
(BA)555
(BA)AAA
(BA)555
(BA)AAA
(BA)555
90
(BA)X00
01
Device ID (Note 9)
6
AA
55
90
(BA)X01
(BA)X02
(BA)X03
7E
(BA)X0E
(BA)X1C
02
(BA)X0F
(BA)X1E
01
Secured Silicon Sector
Factory Protect (Note
10)
Sector/Sector Block
Protect Verify
(Note 11)
Enter Secured Silicon
Sector Region
Exit Secured Silicon Sector
Region
4
AA
55
90
81/01
Byte
AAA
555
(BA)AAA
(BA)X06
Word
4
555
AA
2AA
55
(BA)555
90
(SA)X02
00/01
Byte
AAA
555
(BA)AAA
(SA)X04
Word
Byte
Word
Byte
Word
Byte
Word
Byte
3
555
AAA
555
AAA
555
AAA
555
AAA
XXX
XXX
555
AAA
555
AAA
BA
BA
55
AA
AA
2AA
555
2AA
555
2AA
555
2AA
555
PA
XXX
2AA
555
2AA
555
55
555
AAA
555
AAA
555
AAA
555
AAA
88
4
AA
55
90
XXX
00
Program
4
AA
55
A0
PA
PD
Unlock Bypass
3
AA
55
20
Unlock Bypass Program (Note 12)
Unlock Bypass Reset (Note 13)
2
2
A0
90
PD
00
Chip Erase
Word
Byte
Word
Byte
6
AA
55
555
AAA
555
AAA
80
555
AAA
555
AAA
AA
2AA
555
2AA
555
55
555
AAA
10
Sector Erase
6
AA
55
80
AA
55
SA
30
Erase Suspend (Note 14)
Erase Resume (Note 15)
1
1
B0
30
CFI Query (Note 16)
Word
Byte
1
98
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| AM29DL640H90WHI | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H90WHIN | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
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| AM29DL640H70EEN | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
| AM29DL640H70EI | 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory |
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