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參數(shù)資料
| 型號(hào)： | AM29DL642G70I |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only Simultaneous Read/Write Flash Memo |
| 中文描述： | 128兆位（8米× 16位）的CMOS 3.0伏，只有同時(shí)讀/寫閃存?zhèn)渫?/td> |
| 文件頁數(shù)： | 36/54頁 |
| 文件大?。?/td> | 828K |
| 代理商： | AM29DL642G70I |
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34
Am29DL642G
June 10, 2005
P R E L I M I N A R Y
Table 14.
Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
is in progress. The device outputs array data if the system addresses a non-busy bank.
Status
DQ7
(Note 2)
DQ7#
0
DQ6
Toggle
Toggle
DQ5
(Note 1)
0
0
DQ3
N/A
1
DQ2
(Note 2)
No toggle
Toggle
RY/BY#
0
0
Standard
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspend
Mode
Erase-Suspend-
Read
Erase
Suspended Sector
Non-Erase
Suspended Sector
1
No toggle
0
N/A
Toggle
1
Data
Data
Data
Data
Data
1
Erase-Suspend-Program
DQ7#
Toggle
0
N/A
N/A
0
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