參數(shù)資料
型號： AM29DL800BT90SF
廠商： Advanced Micro Devices, Inc.
英文描述： 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
中文描述： 8兆位（1 M中的x 8-Bit/512畝x 16位），3.0伏的CMOS只，同時作業(yè)快閃記憶體
文件頁數(shù)： 22/46頁
文件大?。?/td> 725K
代理商： AM29DL800BT90SF
20
Am29DL800B
21519C4 December 4, 2006
D A T A S H E E T
Command Definitions
Table 5. Am29DL800B Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed.
Addresses latch on the falling edge of the WE# or CE# pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A18–A12 uniquely select any sector.
BA = Address of the bank that is being switched to autoselect
mode, is in bypass mode, or is being erased. Address bits A18–A16
select a bank.
Notes:
1.
2.
3.
See Table 1 for description of bus operations.
All values are in hexadecimal.
Except when reading array or autoselect data, all bus cycles
are write operations.
Data bits DQ15–DQ8 are don’t cares for unlock and command
cycles.
Address bits A18–A11 are don’t cares for unlock and command
cycles, unless bank address (BA) is required.
No unlock or command cycles required when bank is in read
mode.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 is
goes high (while the bank is providing status information).
4.
5.
6.
7.
8.
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer or device ID information.
The data is 00h for an unprotected sector and 01h for a
protected sector. See the Autoselect Command Sequence
section for more information.
10. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
11. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector
erase operation, and requires the bank address.
13. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
9.
Command
Sequence
(Note 1)
C
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Addr
Fifth
Sixth
Addr
RA
XXX
555
AAA
555
AAA
555
AAA
Data
RD
F0
Data
Data
Addr
Data
Addr
Data
Read (Note 6)
Reset (Note 7)
1
1
A
Manufacturer ID
Word
Byte
Word
Byte
Word
Byte
4
AA
2AA
555
2AA
555
2AA
555
55
(BA)555
(BA)AAA
(BA)555
(BA)AAA
(BA)555
(BA)AAA
90
(BA)X00
01
Device ID,
Top Boot Block
4
AA
55
90
(BA)X01
(BA)X02
(BA)X01
(BA)X02
224A
4A
22CB
CB
XX00
XX01
00
01
Device ID,
Bottom Boot Block
4
AA
55
90
Sector Protect Verify
(Note 9)
Word
4
555
AA
2AA
55
(BA)555
90
(SA)
X02
Byte
AAA
555
(BA)AAA
(SA)
X04
Program
Word
Byte
Word
Byte
4
555
AAA
555
AAA
XXX
BA
555
AAA
555
AAA
BA
BA
AA
2AA
555
2AA
555
PA
XXX
2AA
555
2AA
555
55
555
AAA
555
AAA
A0
PA
PD
Unlock Bypass
3
AA
55
20
Unlock Bypass Program (Note 10)
Unlock Bypass Reset (Note 11)
2
2
A0
90
PD
00
Chip Erase
Word
Byte
Word
Byte
6
AA
55
555
AAA
555
AAA
80
555
AAA
555
AAA
AA
2AA
555
2AA
555
55
555
AAA
10
Sector Erase
6
AA
55
80
AA
55
SA
30
Erase Suspend (Note 12)
Erase Resume (Note 13)
1
1
B0
30
相關(guān)PDF資料
PDF描述
AM29DL800BT90SK 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
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