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參數(shù)資料
| 型號(hào)： | Am29F016D-150SEB |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | DC/DC變換器 |
| 英文描述： | LM3370 Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function; Package: MICRO SMD; No of Pins: 20; Qty per Container: 250; Container: Reel |
| 中文描述： | 16兆位（2米× 8位）的CMOS 5.0伏只，統(tǒng)一部門快閃記憶體 |
| 文件頁數(shù)： | 3/45頁 |
| 文件大?。?/td> | 1145K |
| 代理商： | AM29F016D-150SEB |
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Am29F016D
GENERAL DESCRIPTION
The Am29F016D is a 16 Mbit, 5.0 volt-only Flash mem-
ory organized as 2,097,152 bytes. The 8 bits of data
appear on DQ0–DQ7. The Am29F016D is offered in
48-pin TSOP, 40-pin TSOP, and 44-pin SO packages.
The device is also available in Known Good Die (KGD)
form. For more information, refer to publication number
21551. This device is designed to be programmed
in-system with the standard system 5.0 volt V
CC
supply.
A 12.0 volt V
PP
is not required for program or erase
operations. The device can also be programmed in
standard EPROM programmers.
This device is manufactured using AMD’s 0.23 μm pro-
cess technology, and offers all the features and bene-
fits of the Am29F016, which was manufactured using
0.5 μm process technology.
The standard device offers access times of 70, 90, 120,
and 150 ns, allowing high-speed microprocessors to
operate without wait states. To eliminate bus conten-
tion, the device has separate chip enable (CE#), write
enable (WE#), and output enable (OE#) controls.
The device requires only a
single 5.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard
. Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the
Embedded
Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin.
Device erasure occurs by executing the erase com-
mand sequence. This initiates the
Embedded Erase
algorithm—an internal algorithm that automatically
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle)
status bits
. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The
sector erase architecture
allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved via programming equipment.
The
Erase Suspend
feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The system can place the device into the
standby
mode
. Power consumption is greatly reduced in
this mode.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within a
sector simultaneously via Fowler-Nordheim tunneling.
The data is programmed using hot electron injection.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29F016D-150SI | LM3370 Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function; Package: MICRO SMD; No of Pins: 20; Qty per Container: 250; Container: Reel |
| Am29F016D-150SIB | Evaluation Board for LM3370 Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function; |
| AM29F016D-70E4C | LM3370 Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function; Package: MICRO SMD; No of Pins: 20; Qty per Container: 250; Container: Reel |
| AM29F016D-90EI | 16 Megabit (2 M x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory |
| AM29F016D-90F4C | LM337L 3-Terminal Adjustable Regulator; Package: TO-92; No of Pins: 3; Qty per Container: 1800; Container: Box |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29F016D-70E4D | 制造商:SOCO 功能描述: |
| AM29F016D-70E4F | 功能描述:閃存 16M (2MX8) 70ns 5v Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| AM29F016D-70EF | 功能描述:閃存 16M (2MX8) 70ns 5v Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| AM29F016D-70EI | 制造商:Spansion 功能描述:NOR Flash Parallel 5V 16Mbit 2M x 8bit 70ns 48-Pin TSOP |
| AM29F016D70FI | 制造商:Spansion 功能描述:NOR Flash Parallel 5V 16Mbit 2M x 8bit 70ns 48-Pin RTSOP |
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