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參數(shù)資料
| 型號(hào)： | AM29F032B-75FC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 32 Megabit (4 M x 8-Bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory |
| 中文描述： | 4M X 8 FLASH 5V PROM, 70 ns, PDSO40 |
| 封裝： | REVERSE, MO-142CD, TSOP-40 |
| 文件頁數(shù)： | 9/39頁 |
| 文件大小： | 937K |
| 代理商： | AM29F032B-75FC |
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8
Am29F032B
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. The appropriate device bus operations
table lists the inputs and control levels required, and the
resulting output. The following subsections describe
each of these operations in further detail.
Table 1.
Am29F032B Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 12.0
±
0.5 V, X = Don’t Care, D
IN
= Data In, D
OUT
= Data Out, A
IN
= Address In
Note:
See the sections Sector Group Protection and Temporary Sector Unprotect for more information.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
IL
. CE# is the power
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE#
should remain at V
IH
.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition. No com-
mand is necessary in this mode to obtain array data.
Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid
data on the device data outputs. The device remains
enabled for read access until the command register
contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to the Read Operations Timings diagram for
the timing waveforms. I
CC1
in the DC Characteristics
table represents the active current specification for
reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
IL
, and OE# to V
IH
.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. The Sector Address Tables
indicate the address space that each sector occupies.
A “sector address” consists of the address bits re-
quired to uniquely select a sector. See the “Writing
specific address and data commands or sequences
into the command register initiates device operations.
The Command Definitions table defines the valid reg-
ister command sequences. Writing incorrect address
and data values or writing them in the improper se-
quence resets the device to reading array data.” sec-
tion for details on erasing a sector or the entire chip, or
suspending/resuming the erase operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in
this mode. Refer to the “Autoselect Mode” and “Au-
toselect Command Sequence” sections for more infor-
mation.
I
CC2
in the DC Characteristics table represents the ac-
tive current specification for the write mode. The “AC
Operation
CE#
OE#
WE#
RESET#
A0–A21
DQ0–DQ7
Read
L
L
H
H
A
IN
D
OUT
Write
L
H
L
H
A
IN
D
IN
CMOS Standby
V
CC
± 0.5 V
X
X
V
CC
± 0.5 V
X
High-Z
TTL Standby
H
X
X
H
X
High-Z
Output Disable
L
H
H
H
X
High-Z
Hardware Reset
X
X
X
L
X
High-Z
Temporary Sector Unprotect
(See Note)
X
X
X
V
ID
A
IN
D
IN
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29F032B-75SF | 功能描述:閃存 32M (4MX8) 75ns 5v Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| AM29F032B-90ED | 制造商:Spansion 功能描述:IC FLASH 32MB SMD 29F032 TSOP40 |
| AM29F032B-90EF | 功能描述:閃存 32M (4MX8) 90ns 5v Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| AM29F032B90EK | 制造商:Spansion 功能描述:NOR Flash Parallel 5V 32Mbit 4M x 8bit 90ns 40-Pin TSOP |
| AM29F032B-90SD | 制造商:Spansion 功能描述: |
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