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參數(shù)資料
| 型號： | AM29F200T-90FC |
| 英文描述： | 55V Single N-Channel HEXFET Power MOSFET in a D2-Pak package; A IRFZ48ZS with Standard Packaging |
| 中文描述： | x8/x16閃存EEPROM |
| 文件頁數(shù)： | 19/39頁 |
| 文件大?。?/td> | 728K |
| 代理商： | AM29F200T-90FC |
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Am29F002B/Am29F002NB
19
The DQ5 failure condition may appear if the system
tries to program a “1” to a location that is previously pro-
grammed to “0.”
Only an erase operation can change
a “0” back to a “1.”
Under this condition, the device
halts the operation, and when the operation has
exceeded the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue the
reset command to return the device to reading array
data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system may read DQ3 to determine whether or not an
erase operation has begun. (The sector erase timer
does not apply to the chip erase command.) If addi-
tional sectors are selected for erasure, the entire time-
out also applies after each additional sector erase com-
mand. When the time-out is complete, DQ3 switches
from “0” to “1.” The system may ignore DQ3 if the
system can guarantee that the time between additional
sector erase commands will always be less than 50
μ
s.
See also the “Sector Erase Command Sequence”
section.
After the sector erase command sequence is written,
the system should read the status on DQ7 (Data#
Polling) or DQ6 (Toggle Bit I) to ensure the device has
accepted the command sequence, and then read DQ3.
If DQ3 is “1”, the internally controlled erase cycle has
begun; all further commands (other than Erase Sus-
pend) are ignored until the erase operation is complete.
If DQ3 is “0”, the device will accept additional sector
erase commands. To ensure the command has been
accepted, the system software should check the status
of DQ3 prior to and following each subsequent sector
erase command. If DQ3 is high on the second status
check, the last command might not have been
accepted. Table 6 shows the outputs for DQ3.
START
No
Yes
Yes
DQ5 = 1
No
Yes
Toggle Bit
= Toggle
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle
Read DQ7–DQ0
Twice
Read DQ7–DQ0
Notes:
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as DQ5
changes to “1”. See text.
Figure 5.
Toggle Bit Algorithm
(Notes
1, 2)
(Note 1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29F200T-90FE | 100V Single N-Channel HEXFET Power MOSFET in a TO-262 package; A IRF540ZL with Standard Packaging |
| AM29F200T-90FEB | 30V Single N-Channel HEXFET Power MOSFET in a D-Pak package; A IRLR7843 with Standard Packaging |
| AM29F200T-90FI | 55V Single N-Channel HEXFET Power MOSFET in a I-Pak package; A IRLU024Z with Standard Packaging |
| AM29F200T-90SC | 20V Single N-Channel HEXFET Power MOSFET in a SO-8 package; Similar to IRF1902 with Lead Free Packaging |
| AM29F200T-90SE | x8/x16 Flash EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29F400AB-120DGC1 | 制造商:Spansion 功能描述:4M FLASH KNOWN GOOD DIE W/ TOP BOOT (COMMERCIAL TEMP) - Gel-pak, waffle pack, wafer, diced wafer on film |
| AM29F400AB120EC | 制造商:AMD 功能描述:* |
| AM29F400AB-120SC | 制造商:Advanced Micro Devices 功能描述:Flash Mem Parallel 5V 4M-Bit 512K x 8/256K x 16 120ns 44-Pin SO |
| AM29F400AB-70EI | 制造商:Advanced Micro Devices 功能描述: |
| AM29F400AB-75EC | 制造商:Advanced Micro Devices 功能描述: |
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