參數(shù)資料
型號: AM29LV002BT-90EF
廠商: SPANSION LLC
元件分類: PROM
英文描述: Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:2Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:90ns; Series:AM29 RoHS Compliant: Yes
中文描述: 256K X 8 FLASH 3V PROM, 90 ns, PDSO40
封裝: LEAD FREE, MO-142BCD, TSOP-40
文件頁數(shù): 35/41頁
文件大?。?/td> 687K
代理商: AM29LV002BT-90EF
38
Am29LV002B
21520D5 October 11, 2006
D A TA SH EET
REVISION SUMMARY
Revision A (January 1998)
Released initial, abbreviated version.
Revision B (June 1998)
Expanded data sheet from Advanced Information to
Preliminary version.
Distinctive Characteristics
Changed “Manufactured on 0.35 m process technology”
to “Manufactured on 0.32 m process technology”.
General Description
Second paragraph: Changed “This device is manufac-
tured using AMD’s 0.35 m process technology” to
“This device is manufactured using AMD’s 0.32 m
process technology”
Revision B+1 (August 1998)
Global
Added the -55R speed option; deleted the -80 speed
option.
DC Characteristics
Added the note on maximum ICC specifications to
table.
AC Characteristics
Alternate CE# Controlled Erase/Progran Operations:
Corrected the -90 tCP specification.
Revision C (January 1999)
Distinctive Characteristics
Added bullet for 20-year data retention at 125
°C
AC Characteristics—Erase/Program Operations
tDVWH: Changed the -55R speed option to 35 ns from
20 ns.
tWLWH: Changed the -55R speed option to 35 ns from
30 ns.
AC Characteristics—Alternate CE# Controlled
Erase/Program Operations
tDVEH: Changed the -55R speed option to 35 ns from 20
ns.
TSOP Pin Capacitance
Changed from “TSOP and SO Pin Capacitance”.
Revision D (November 18, 1999)
AC Characteristics—Figure 15. Program
Operations Timing and Figure 16. Chip/Sector
Erase Operations
Deleted tGHWL and changed OE# waveform to start at
high.
Physical Dimensions
Replaced figures with more detailed illustrations.
Revision D+1 (November 13, 2000)
Added table of contents. Deleted burn-in option from
Ordering Information section.
Revision D+2 (June 14, 2004)
Added Pb-free package OPNs.
Revision D+3 (January 5, 2006)
Removed all Reverse TSOP options.
Revision D+4 (September 12, 2006)
Erase and Program Operations table
Changed tBUSY to a maximum specification.
Revision D5 (October 11, 2006)
Global
Added notice on product availability.
相關(guān)PDF資料
PDF描述
AM29LV004BB-120ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:120ns; Series:AM29 RoHS Compliant: Yes
AM29LV004BB-120EF Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:120ns; Series:AM29 RoHS Compliant: Yes
AM29LV004BB-70ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:70ns; Series:AM29 RoHS Compliant: Yes
AM29LV004BB-70EF Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:70ns; Series:AM29 RoHS Compliant: Yes
AM29LV004BB-90ED Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:4Mbit; Package/Case:48-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:90ns; Series:AM29 RoHS Compliant: Yes
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