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  • 參數(shù)資料
    型號: AM29LV033C-70FE
    廠商: Advanced Micro Devices, Inc.
    英文描述: 32 Megabit (4 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory
    中文描述: 32兆位(4個M × 8位)的CMOS 3.0伏特,只有統(tǒng)一部門閃存
    文件頁數(shù): 10/48頁
    文件大小: 1023K
    代理商: AM29LV033C-70FE
    Am29LV033C
    9
    DEVICE BUS OPERATIONS
    This section describes the requirements and use of
    the device bus operations, which are initiated through
    the internal command register. The command register
    itself does not occupy any addressable memory loca-
    tion. The register is composed of latches that store the
    commands, along with the address and data informa-
    tion needed to execute the command. The contents of
    the register serve as inputs to the internal state ma-
    chine. The state machine outputs dictate the function
    of the device. Table 1 lists the device bus operations,
    the inputs and control levels they require, and the re-
    sulting output. The following subsections describe
    each of these operations in further detail.
    Table 1.
    Am29LV033C Device Bus Operations
    Legend:
    L = Logic Low = V
    IL
    , H = Logic High = V
    IH
    , V
    ID
    = 12.0 ± 0.5 V, X = Don’t Care, A
    IN
    = Address In, D
    IN
    = Data In, D
    OUT
    = Data Out
    Notes:
    1. When the ACC pin is at V
    HH
    , the device enters the accelerated program mode. See “Accelerated Program Operations” for
    more information.
    2.
    The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
    Block Protection and Unprotection” section.
    Requirements for Reading Array Data
    To read array data from the outputs, the system must
    drive the CE# and OE# pins to V
    IL
    . CE# is the power
    control and selects the device. OE# is the output con-
    trol and gates array data to the output pins. WE#
    should remain at V
    IH
    .
    The internal state machine is set for reading array data
    upon device power-up, or after a hardware reset. This
    ensures that no spurious alteration of the memory
    content occurs during the power transition. No com-
    mand is necessary in this mode to obtain array data.
    Standard microprocessor read cycles that assert valid
    addresses on the device address inputs produce valid
    data on the device data outputs. The device remains
    enabled for read access until the command register
    contents are altered.
    See “Reading Array Data” for more information. Refer
    to the AC Read Operations table for timing specifica-
    tions and to Figure 13 for the timing diagram. I
    CC1
    in
    the DC Characteristics table represents the active cur-
    rent specification for reading array data.
    Writing Commands/Command Sequences
    To write a command or command sequence (which in-
    cludes programming data to the device and erasing
    sectors of memory), the system must drive WE# and
    CE# to V
    IL
    , and OE# to V
    IH
    .
    The device features an
    Unlock Bypass
    mode to facili-
    tate faster programming. Once the device enters the
    Unlock Bypass mode, only two write cycles are re-
    quired to program a byte, instead of four. The “Byte
    Program Command Sequence” section has details on
    programming data to the device using both standard
    and Unlock Bypass command sequences.
    An erase operation can erase one sector, multiple sec-
    tors, or the entire device. Table 2 indicates the address
    Operation
    CE#
    OE#
    WE#
    RESET#
    Addresses
    DQ0–DQ7
    Read
    L
    L
    H
    H
    A
    IN
    D
    OUT
    Write (Note 1)
    L
    H
    L
    H
    A
    IN
    D
    IN
    Standby
    V
    CC
    ±
    0.3 V
    X
    X
    V
    CC
    ±
    0.3 V
    X
    High-Z
    Output Disable
    L
    H
    H
    H
    X
    High-Z
    Reset
    X
    X
    X
    L
    X
    High-Z
    Sector/Sector Block Protect
    (Note 2)
    L
    H
    L
    V
    ID
    Sector Addresses,
    A6 = L, A1 = H, A0 = L
    D
    IN
    , D
    OUT
    Sector/Sector Block Unprotect
    (Note 2)
    L
    H
    L
    V
    ID
    Sector Addresses
    A6 = H, A1 = H, A0 = L
    D
    IN
    , D
    OUT
    Temporary Sector/Sector Block
    Unprotect
    X
    X
    X
    V
    ID
    A
    IN
    D
    IN
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