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    參數(shù)資料
    型號: AM29LV065MU30WHI
    廠商: Advanced Micro Devices, Inc.
    英文描述: 64 Megabit (8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control
    中文描述: 64兆位(8米× 8位)的MirrorBit⑩3.0伏特,只有統(tǒng)一部門閃存記憶體與VersatileI /輸出⑩控制
    文件頁數(shù): 44/62頁
    文件大?。?/td> 778K
    代理商: AM29LV065MU30WHI
    42
    Am29LV065MU
    September 12, 2006
    D A T A S H E E T
    AC CHARACTERISTICS
    Read-Only Operations
    Notes:
    1. Not 100% tested.
    2. See Figure 11 and Table 12 for test specifications.
    3. AC specifications listed are tested with V
    IO
    = V
    CC.
    Contact AMD for more information on AC Operation with V
    IO
    V
    CC
    .
    Parameter
    Description
    Test Setup
    Speed Options
    JEDE
    C
    Std.
    90R
    101,
    101R
    112R
    112
    120R
    120
    Unit
    t
    AVAV
    t
    RC
    Read Cycle Time (Note 1)
    Min
    90
    100
    110
    120
    ns
    t
    AVQV
    t
    ACC
    Address to Output Delay
    CE#, OE# =
    V
    IL
    Max
    90
    100
    110
    120
    ns
    t
    ELQV
    t
    CE
    Chip Enable to Output Delay
    OE# = V
    IL
    Max
    90
    100
    110
    120
    ns
    t
    PACC
    Page Access Time
    Max
    25
    30
    30
    40
    30
    40
    ns
    t
    GLQV
    t
    OE
    Output Enable to Output Delay
    Max
    25
    30
    30
    40
    30
    40
    ns
    t
    EHQZ
    t
    DF
    Chip Enable to Output High Z
    (Note 1)
    Max
    25
    ns
    t
    GHQZ
    t
    DF
    Output Enable to Output High Z
    (Note 1)
    Max
    25
    ns
    t
    AXQX
    t
    OH
    Output Hold Time From Addresses,
    CE# or OE#, Whichever Occurs First
    Min
    0
    ns
    t
    OEH
    Output Enable
    Hold Time
    (Note 1)
    Read
    Min
    0
    ns
    Toggle and
    Data# Polling
    Min
    10
    ns
    t
    OH
    t
    CE
    Outputs
    WE#
    Addresses
    CE#
    OE#
    HIGH Z
    Output Valid
    HIGH Z
    Addresses Stable
    t
    RC
    t
    ACC
    t
    OEH
    t
    RH
    t
    OE
    t
    RH
    0 V
    RY/BY#
    RESET#
    t
    DF
    Figure 14.
    Read Operation Timings
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