參數(shù)資料
型號: AM29LV160MT50PCI
廠商: Advanced Micro Devices, Inc.
英文描述: 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) MirrorBit TM 3.0 Volt-only Boot Sector Flash Memory
中文描述: 16兆位(2米× 8位/ 1個M x 16位)的MirrorBit?3.0伏,只引導扇區(qū)閃存
文件頁數(shù): 33/63頁
文件大?。?/td> 967K
代理商: AM29LV160MT50PCI
January31,2007 25974B5
Am29LV160M
31
D a t a S h e e t
Command Definitions Tables
Table 10.
Command Definitions (x16 Mode, BYTE# = V
IH
)
Legend:
X = Don’t care
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address. Addresses latch on falling edge of WE# or CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on rising edge of WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or erased. Address bits A19–A15 uniquely select any sector.
Command
Sequence
( Note 1)
C
Bus Cycles ( Notes 2– 5)
Third
Addr
Data
First
Second
Addr
Fourth
Fifth
Sixth
Addr
RA
XXX
555
555
555
Data
RD
F0
AA
AA
AA
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 5)
Reset (Note 6)
Manufacturer ID
Device ID, Top Boot (Note 8)
Device ID, Bottom Boot (Note 8)
Secured Silicon Sector Factory
Protect
(Note 15)
Sector Group Protect Verify
(Note 9)
Enter Secured Silicon Sector Region
Exit Secured Silicon Sector Region
Program
Unlock Bypass
Unlock Bypass Program (Note 10)
Unlock Bypass Reset (Note 11)
Chip Erase
Sector Erase
Program/Erase Suspend (Note 12)
Program/Erase Resume (Note 13)
CFI Query (Note 14)
1
1
4
6
6
A
2AA
2AA
2AA
55
55
55
555
555
555
90
90
90
X00
X01
X01
0001
22C4
2249
4
555
AA
2AA
55
555
90
X03
83/03
4
555
AA
2AA
55
555
90
(SA)X02
00/01
3
4
4
3
2
2
6
6
1
1
1
555
555
555
555
XXX
XXX
555
555
XXX
XXX
55
AA
AA
AA
AA
A0
90
AA
AA
B0
30
98
2AA
2AA
2AA
2AA
PA
XXX
2AA
2AA
55
55
55
55
PD
00
55
55
555
555
555
555
88
90
A0
20
XXX
PA
00
PD
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
Notes:
1.
2.
3.
See
Table 1, on page 10
for description of bus operations.
All values are in hexadecimal.
Shaded cells indicate read cycles. All others are write
cycles.
During unlock and command cycles, when lower address
bits are 555 or 2AA as shown in table, address bits above
A11 and data bits above DQ7 are don’t care.
No unlock or command cycles required when device is in
read mode.
Reset command is required to return to read mode (or to
erase-suspend-read mode if previously in Erase Suspend)
when device is in autoselect mode, or if DQ5 goes high
while device is providing status information.
Fourth cycle of the autoselect command sequence is a
read cycle. Data bits DQ15–DQ8 are don’t care. See
“Autoselect Command Sequence” on page 24
for more
information.
Device ID must be read in three cycles.
4.
5.
6.
7.
8.
9.
Data is 00h for an unprotected sector group and 01h for a
protected sector group.
10. Unlock Bypass command is required prior to Unlock
Bypass Program command.
11. Unlock Bypass Reset command is required to return to
read mode when device is in unlock bypass mode.
12. System may read and program in non-erasing sectors, or
enter autoselect mode, when in Erase Suspend mode.
Erase Suspend command is valid only during a sector
erase operation.
13. Erase Resume command is valid only during Erase
Suspend mode.
14. Command is valid when device is ready to read array data
or when device is in autoselect mode.
15. Data is 83h for factory locked and 03h for not factory
locked.
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