- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366514 > AM29LV640MB120RWHI (ADVANCED MICRO DEVICES INC) 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory PDF資料下載
參數(shù)資料
| 型號： | AM29LV640MB120RWHI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
| 中文描述： | 4M X 16 FLASH 3V PROM, 120 ns, PBGA63 |
| 封裝： | 12 X 11 MM, 0.80 MM PITCH, FBGA-63 |
| 文件頁數(shù)： | 35/66頁 |
| 文件大小： | 836K |
| 代理商： | AM29LV640MB120RWHI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
February1,2007 26190C8
Am29LV640MT/B
33
D A T A S H E E T
The system must write the Program Resume com-
mand (address bits are don’t care) to exit the Program
Suspend mode and continue the programming opera-
tion. Further writes of the Resume command are ig-
nored. Another Program Suspend command can be
written after the device has resume programming.
Figure 6.
Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does
not
require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Tables
12
and
13
shows the address and data requirements for the
chip erase command sequence.
Note that the autose-
lect and CFI functions are unavailable when an erase
operation is in progress.
When the Embedded Erase algorithm is complete, the
device returns to the read mode and addresses are no
longer latched. The system can determine the status
of the erase operation by using DQ7, DQ6, or DQ2.
See
Write Operation Status on page 38
for information
on these status bits.
Any commands written during the chip erase operation
are ignored. However, note that a
hardware reset
im-
mediately terminates the erase operation. If that oc-
curs, the chip erase command sequence should be
reinitiated once the device has returned to reading
array data, to ensure data integrity.
Figure 7
illustrates the algorithm for the erase opera-
tion. See the table,
Erase and Program Operations on
page 48
in
AC Characteristics
for parameters, and
Fig-
ure 19
for timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector
erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two ad-
ditional unlock cycles are written, and are then fol-
lowed by the address of the sector to be erased, and
the sector erase command. Tables
12
and
13
shows
the address and data requirements for the sector
erase command sequence.
Note that the autoselect
and CFI functions are unavailable when an erase op-
eration is in progress.
The device does
not
require the system to preprogram
prior to erase. The Embedded Erase algorithm auto-
matically programs and verifies the entire memory for
an all zero data pattern prior to electrical erase. The
system is not required to provide any controls or tim-
ings during these operations.
After the command sequence is written, a sector erase
time-out of 50 μs occurs. During the time-out period,
additional sector addresses and sector erase com-
mands can be written. Loading the sector erase buffer
can be done in any sequence, and the number of sec-
tors can be from one sector to all sectors. The time be-
tween these additional cycles must be less than 50 μs,
otherwise erasure can begin. Any sector erase ad-
dress and command following the exceeded time-out
might or might not be accepted. It is recommended
that processor interrupts be disabled during this time
to ensure all commands are accepted. The interrupts
can be re-enabled after the last Sector Erase com-
mand is written.
Any command other than Sector
Erase or Erase Suspend during the time-out pe-
riod resets the device to the read mode.
The sys-
tem must rewrite the command sequence and any
additional addresses and commands.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μ
s
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29LV640MB120WHF | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV640MB120WHI | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV640MB90REF | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV640MB90REI | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
| AM29LV640MB90RPCF | 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV640MB-90REI | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV640MH112REI | 制造商:Advanced Micro Devices 功能描述:4M X 16 FLASH 3V PROM, 110 ns, PDSO56 |
| AM29LV640MU101RPCI | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV640MU90NI | 制造商:Advanced Micro Devices 功能描述: |
| AM29LV640MU90RPC1 | 制造商:Advanced Micro Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。