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參數(shù)資料
| 型號(hào)： | AM29LV641MH101FI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (4 M x 16-Bit) MirrorBita?? 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/Oa?? Control |
| 中文描述： | 4M X 16 FLASH 3V PROM, 100 ns, PDSO48 |
| 封裝： | REVERSE, MO-142BDD, TSOP-48 |
| 文件頁(yè)數(shù)： | 41/60頁(yè) |
| 文件大?。?/td> | 640K |
| 代理商： | AM29LV641MH101FI |
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December 21, 2005
Am29LV641MH/L
39
D A T A S H E E T
AC CHARACTERISTICS
Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 12 and Table 12 for test specifications.
3. AC Specifications listed are tested with V
IO
= V
CC
. Contact AMD for information on AC operation with V
IO
≠
V
CC
.
Parameter
Description
Test Setup
Speed Options
JEDE
C
Std.
90R
101R,
101
112R
112
120R
120
Unit
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
90
100
110
120
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# =
V
IL
Max
90
100
110
120
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
100
110
120
ns
t
PACC
Page Access Time
Max
25
30
30
40
30
40
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
30
40
30
40
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note
1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z
(Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses,
CE# or OE#, Whichever Occurs First
Min
0
ns
t
OEH
Output Enable
Hold Time (Note
1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
t
OH
t
CE
Outputs
WE#
Addresses
CE#
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
t
RC
t
ACC
t
OEH
t
RH
t
OE
t
RH
RESET#
t
DF
Figure 14.
Read Operation Timings
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