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參數(shù)資料
| 型號： | AM29PDLI27H63VKIN |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| 中文描述： | 128兆位（8米× 16位），3.0伏的CMOS只，頁面模式同步讀/寫閃存與增強VersatileIO控制記憶 |
| 文件頁數(shù)： | 11/68頁 |
| 文件大?。?/td> | 750K |
| 代理商： | AM29PDLI27H63VKIN |
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June 30, 2003
Am29PDL127H
9
A D V A N C E I N F O R M A T I O N
PIN DESCRIPTION
A22–A0
=
23-bit address bus for 128 Mb de-
vice. A9 supports 12 V autoselect in-
puts.
DQ15–DQ0 =
16-bit data inputs/outputs/float
CE#
=
Chip Enable Inputs
OE#
=
Output Enable Input
WE#
=
Write Enable
V
SS
NC
=
Device Ground
=
Pin Not Connected Internally
RY/BY#
=
Ready/Busy output and open drain.
When RY/BY#= V
IH
, the device is
ready to accept read operations and
commands. When RY/BY#= V
OL
,
the device is either executing an em-
bedded algorithm or the device is
executing a hardware reset opera-
tion.
WP#/ACC
=
Write Protect/Acceleration Input.
When WP/ACC#= V
IL
, the highest
and lowest two 4K-word sectors are
write protected regardless of other
sector protection configurations.
When WP/ACC#= V
IH
, these sector
are unprotected unless the DYB or
PPB is programmed. When
WP/ACC#= 12V, program and erase
operations are accelerated.
V
IO
=
Input/Output Buffer Power Supply
(1.65 V to 1.95 V or 2.7 V to 3.6 V)
V
CC
=
Chip Power Supply
(2.7 V to 3.6 V or 2.7 to 3.3 V)
RESET#
=
Hardware Reset Pin
LOGIC SYMBOL
23
16
DQ15–DQ0
A22–A0
CE#
OE#
WE#
RESET#
RY/BY#
WP#/ACC
V
IO
(V
CCQ
)
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