參數(shù)資料
型號： AM29PL160CB-65RSI
廠商： ADVANCED MICRO DEVICES INC
元件分類： PROM
英文描述： 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory
中文描述： 1M X 16 FLASH 3V PROM, 65 ns, PDSO44
封裝： SO-44
文件頁數(shù)： 4/44頁
文件大小： 987K
代理商： AM29PL160CB-65RSI
June 12, 2002
Am29PL160C
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .8
Table 1. Am29PL160C Device Bus Operations ................................8
Word/Byte Configuration ..........................................................8
Requirements for Reading Array Data .....................................8
Read Mode ...............................................................................8
Random Read (Non-Page Mode Read) ............................................8
Page Mode Read ......................................................................9
Table 2. Word Mode ..........................................................................9
Table 3. Byte Mode ...........................................................................9
Writing Commands/Command Sequences ............................10
Program and Erase Operation Status ....................................10
Standby Mode ........................................................................10
Automatic Sleep Mode ...........................................................10
Output Disable Mode ..............................................................10
Table 4. Sector Address Table, Bottom Boot (Am29PL160CB) ......11
Autoselect Mode .....................................................................12
Table 5. Am29PL160C Autoselect Codes (High Voltage Method) ..12
Sector Protection/Unprotection ...............................................12
Common Flash Memory Interface (CFI). . . . . . . 13
Table 6. CFI Query Identification String ..........................................13
Table 7. System Interface String .....................................................14
Table 8. Device Geometry Definition ..............................................14
Table 9. Primary Vendor-Specific Extended Query ........................15
Hardware Data Protection. . . . . . . . . . . . . . . . . . 15
Low V
CC
Write Inhibit ......................................................................15
Write Pulse “Glitch” Protection ........................................................15
Logical Inhibit ..................................................................................15
Power-Up Write Inhibit ....................................................................15
Command Definitions . . . . . . . . . . . . . . . . . . . . . .16
Reading Array Data ................................................................16
Reset Command .....................................................................16
Autoselect Command Sequence ............................................16
Word/Byte Program Command Sequence .............................16
Unlock Bypass Command Sequence ..............................................17
Figure 1. Program Operation.......................................................... 17
Chip Erase Command Sequence ...........................................17
Sector Erase Command Sequence ........................................18
Erase Suspend/Erase Resume Commands ...........................18
Temporary Unprotect Enable/Disable Command Sequence ..19
Figure 2. Erase Operation............................................................... 19
Command Definitions............................................................. 20
Table 10. Am29PL160C Command Definitions ..............................20
Write Operation Status . . . . . . . . . . . . . . . . . . . . 21
DQ7: Data# Polling .................................................................21
Figure 3. Data# Polling Algorithm................................................... 21
DQ6: Toggle Bit ......................................................................22
DQ2: Toggle Bit ......................................................................22
Reading Toggle Bits DQ6/DQ2 ..............................................22
DQ5: Exceeded Timing Limits ................................................22
Figure 4. Toggle Bit Algorithm........................................................ 23
DQ3: Sector Erase Timer .......................................................23
Table 11. Write Operation Status ...................................................24
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 25
Figure 5. Maximum Negative OvershootWaveform...................... 25
Figure 6. Maximum Positive OvershootWaveform........................ 25
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 25
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 7. I
CC1
Current vs. Time (Showing Active and Automatic
SleepCurrents).............................................................................. 27
Figure 8. Typical I
CC1
vs. Frequency............................................. 27
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 9. Test Setup....................................................................... 28
Table 12. Test Specifications .........................................................28
Key to Switching Waveforms . . . . . . . . . . . . . . . 28
Figure 10. Input Waveforms and Measurement Levels................. 28
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11. Conventional Read Operations Timings....................... 30
Figure 12. Page Read Timings...................................................... 30
Figure 13. BYTE# Timings for Read Operations............................ 31
Figure 14. BYTE# Timings for Write Operations............................ 31
Figure 15. Program Operation Timings.......................................... 33
Figure 16. AC Waveforms for Chip/Sector Erase Operations........ 34
Figure 17. Data# Polling Timings (During Embedded Algorithms). 34
Figure 18. Toggle Bit Timings (During Embedded Algorithms)...... 35
Figure 19. DQ2 vs. DQ6 for Erase and
Erase Suspend Operations............................................................ 35
Figure 20. Alternate CE# Controlled Write Operation Timings...... 37
Erase and Programming Performance . . . . . . . 38
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 38
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 38
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 39
TS 048—48-Pin Standard Thin Small Outline Package .........39
SO 044—44-Pin Small Outline Package, Standard Pinout ....40
SOR044—44-Pin Small Outline Package, Reverse Pinout ....41
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 42
Revision A (August 1998) .......................................................42
Revision A+1 (September 1998) ............................................42
Revision B (January 1999) .....................................................42
Revision B+1 (February 1999) ................................................42
Revision B+2 (March 5, 1999) ................................................42
Revision B+3 (May 14, 1999) .................................................42
Revision B+4 (June 25, 1999) ................................................42
Revision B+5 (July 26, 1999) ..................................................42
Revision B+6 (September 2, 1999) ........................................42
Revision B+7 (February 4, 2000) ............................................42
Revision C (February 21, 2000) ..............................................42
Revision C+1 (June 20, 2000) ................................................42
Revision C+2 (June 28, 2000) ................................................42
Revision C+3 (November 14, 2000) .......................................42
Revision C+4 (June 12, 2002) ................................................42
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