參數(shù)資料
型號: AM29SL800BB200EC
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
中文描述: 1M X 8 FLASH 1.8V PROM, 200 ns, PDSO48
封裝: TSOP-48
文件頁數(shù): 27/41頁
文件大小: 543K
代理商: AM29SL800BB200EC
Am29SL800B
27
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Read Operations
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 7 for test specifications.
Parameter
Description
Speed Option
JEDEC
Std
Test Setup
170
200
Unit
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
170
200
ns
t
AVQV
t
ACC
Address to Output Delay
CE# = V
IL
OE# = V
IL
Max
170
200
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
170
200
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
90
90
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
50
60
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
50
60
ns
t
OEH
Output Enable
Hold Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
30
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First (Note 1)
Min
0
ns
t
CE
Outputs
WE#
Addresses
CE#
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
t
ACC
t
RC
t
OEH
t
OE
0 V
RY/BY#
RESET#
t
DF
t
OH
21545A-17
Figure 13.
Read Operations Timings
相關(guān)PDF資料
PDF描述
Am29SL800BB200ECB 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
AM29SL800BB200EI 8-Bit Identity/Magnitude Comparators (P=Q) with Enable 20-CDIP -55 to 125
Am29SL800BB200EIB High Speed CMOS Logic Dual Positive-Edge Trigger D Flip-Flops with Set and Reset 14-CDIP -55 to 125
AM29SL800BB200FC 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
Am29SL800BB200FCB High Speed CMOS Logic Dual Positive-Edge Trigger D Flip-Flops with Set and Reset 14-CDIP -55 to 125
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