參數(shù)資料
型號(hào)： AM41DL6408H8H71IS
廠商： Advanced Micro Devices, Inc.
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVP00; No. of Contacts:6; Connector Shell Size:11; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
中文描述： 堆疊式多芯片封裝（MCP）閃存和SRAM
文件頁(yè)數(shù)： 25/66頁(yè)
文件大?。?/td> 1123K
代理商： AM41DL6408H8H71IS
November 24, 2003
Am41DL6408H
23
A D V A N C E I N F O R M A T I O N
Figure 3.
SecSi Sector Protect Verify
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 14 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC
power-up
and power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
CC
is greater than V
LKO
. The
system must provide the proper signals to the control
pins to prevent unintentional writes when V
CC
is
greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#f
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
IL
, CE#f = V
IH
or WE# = V
IH
. To initiate a write cycle,
CE#f and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE#f = V
IL
and OE# = V
IH
during power up,
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h in word mode (or address AAh in byte mode), any
time the device is ready to read array data. The
system can read CFI information at the addresses
given in Tables 10–13. To terminate reading CFI data,
the system must write the reset command.The CFI
Query mode is not accessible when the device is exe-
cuting an Embedded Program or embedded Erase al-
gorithm.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 10–13. The
system must write the reset command to return the
device to reading array data.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at
http://www.amd.com/flash/cfi.
Alterna-
tively, contact an AMD representative for copies of
these documents.
Write 60h to
any address
Write 40h to SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
START
RESET# =
V
IH
or V
ID
Wait 1
μ
s
Read from SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
If data = 00h,
SecSi Sector is
unprotected.
If data = 01h,
SecSi Sector is
protected.
Remove V
or V
ID
from RESET#
Write reset
command
SecSi Sector
Protect Verify
complete
相關(guān)PDF資料
PDF描述
AM41DL6408H8H71IT TV 6C 6#20 PIN WALL RECP
AM41DL6408H8H85IS Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408H8H85IT Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41LV3204MB10IT Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM41DL6408H8H71IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408H8H85IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408H8H85IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41LV3204M 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
AM41LV3204MB10I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
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