參數(shù)資料
型號： AM41PDS3224DB100IS
廠商： Advanced Micro Devices, Inc.
英文描述： 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
中文描述： 32兆位（2米× 16位），1.8伏的CMOS只，同時操作，頁面模式閃存和4兆位（512畝x 8-Bit/256畝x 16位），靜態(tài)存儲器
文件頁數(shù)： 28/59頁
文件大?。?/td> 560K
代理商： AM41PDS3224DB100IS
May 13, 2002
Am41PDS3224D
27
P R E L I M I N A R Y
Table 10.
Am29PDS322D Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SGA = Address of the sector group to be verified (in autoselect mode)
or erased. Address bits A20–A12 uniquely select any sector.
Notes:
1.
2.
3.
See Table 1 for description of bus operations.
All values are in hexadecimal.
Except for the read cycle and the fourth and fifth cycle of the
autoselect command sequence, all bus cycles are write cycles.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
Unless otherwise noted, address bits A20–A12 are don’t cares in
unlock sequence.
No unlock or command cycles required when device is in read
mode.
The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when the device is in the autoselect mode, or if DQ5 goes high
(while the device is providing status information).
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or SecSi Sector factory protect
information. Data bits DQ15–DQ8 are don’t care. See the
Autoselect Command Sequence section for more information.
4.
5.
6.
7.
8.
9.
The device ID must be read across the fourth, fifth and sixth
cycles. The sixth cycle specifies 2201h for top boot or 2200h for
bottom boot.
10. The data is 80h for factory locked and 00h for not factory locked.
11. The data is 00h for an unprotected sector group and 01h for a
protected sector group.
12. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
13. The Unlock Bypass Reset command is required to return to the
read mode when the device is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
Command
Sequence
(Note 1)
C
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Fifth
Sixth
Addr
RA
XXX
555
Data
RD
F0
AA
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 6)
Reset (Note 7)
Manufacturer ID
1
1
4
A
2AA
55
555
90
X00
0001
Device ID (Note 9)
4
555
AA
2AA
55
555
90
X01
227E
X0E
2206
X0F
2201/
2200
SecSi Sector Factory
Protect (Note 10)
Sector Group Protect Verify
(Note 11)
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Unlock Bypass
4
555
AA
2AA
55
555
90
X03
80/00
4
555
AA
2AA
55
555
90
(SGA)
X02
XX00/
XX01
3
4
4
3
2
2
6
6
1
1
555
555
555
555
AA
AA
AA
AA
2AA
2AA
2AA
2AA
55
55
55
55
555
555
555
555
88
90
A0
20
XXX
PA
00
PD
Unlock Bypass Program (Note 12)
XXX
A0
PA
PD
Unlock Bypass Reset (Note 13)
Chip Erase
Sector Erase
Erase Suspend (Note 14)
Erase Resume (Note 15)
XXX
555
555
BA
BA
90
AA
AA
B0
30
XXX
2AA
2AA
00
55
55
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
相關(guān)PDF資料
PDF描述
AM41PDS3224DB100IT 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB10IS 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB10IT 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB110IS 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB110IT 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM41PDS3224DB100IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB10IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB10IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB110IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DB110IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
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