參數(shù)資料
型號(hào): AM41PDS3224DT11IS
廠商: ADVANCED MICRO DEVICES INC
元件分類: 存儲(chǔ)器
英文描述: 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 8 X 11.60 MM, FBGA-73
文件頁(yè)數(shù): 25/59頁(yè)
文件大?。?/td> 560K
代理商: AM41PDS3224DT11IS
24
Am41PDS3224D
May 13, 2002
P R E L I M I N A R Y
Figure 3.
Unlock Bypass Algorithm
The device offers accelerated program operations
through the WP#/ACC pin. When the system asserts
V
HH
on the WP#/ACC pin, the device automatically en-
ters the Unlock Bypass mode. The system may then
write the two-cycle Unlock Bypass program command
sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation. Note that
the WP#/ACC pin must not be at V
HH
any operation
other than accelerated programming, or device dam-
age may result. In addition, the WP#/ACC pin must not
be left floating or unconnected; inconsistent behavior
of the device may result.
Figure 4 illustrates the algorithm for the program oper-
ation. Refer to the Flash Erase and Program Opera-
tions table in the AC Characteristics section for
parameters, and Figure 18 for timing diagrams.
Note:
See Table 10 for program command sequence.
Figure 4.
Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase
command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does
not
require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Table 10
shows the address and data requirements for the chip
erase command sequence.
Start
555h/AAh
2AAh/55h
XXXh/A0h
555h/20h
Verify Byte
No
Program Address/Program Data
Data# Polling Device
Last Address
Programming Completed
(BA)
XXXh/90h
XXXh/00h
Increment
Address
No
Yes
Yes
Set
Unlock
Bypass
Mode
In
Unlock
Bypass
Program
Reset
Unlock
Bypass
Mode
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM41PDS3224DT11IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DT35IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DT35IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DT40IS 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM41PDS3224DT40IT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM