參數(shù)資料
型號(hào): AM49DL640BH
英文描述: Am49DL640BH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述: Am49DL640BH -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁(yè)數(shù): 44/62頁(yè)
文件大?。?/td> 933K
代理商: AM49DL640BH
42
Am49DL3208G
September 19, 2003
A D V A N C E I N F O R M A T I O N
FLASH AC CHARACTERISTICS
Word Configuration
Parameter
All Speed Options
JEDEC
Std
Description
Unit
t
ELFL/
t
ELFH
CE#f to CIOf Switching Low or High
Max
5
ns
t
FLQZ
CIOf Switching Low to Output HIGH Z
Max
16
ns
t
FHQV
CIOf Switching High to Output Active
Min
70
ns
DQ15
Output
Data Output
(DQ7–DQ0)
CE#f
OE#
CIOf
t
ELFL
DQ0–DQ14
Data Output
(DQ14–DQ0)
DQ15/A-1
Address
Input
t
FLQZ
CIOf
Switching
from word
to byte
mode
DQ15
Output
Data Output
(DQ7–DQ0)
CIOf
t
ELFH
DQ0–DQ14
Data Output
(DQ14–DQ0)
DQ15/A-1
Address
Input
t
FHQV
CIOf
Switching
from byte
to word
mode
Figure 18.
CIOf Timings for Read Operations
Note:
Refer to the Erase/Program Operations table for t
AS
and t
AH
specifications.
Figure 19.
CIOf Timings for Write Operations
CE#f
WE#
CIOf
The falling edge of the last WE# signal
t
HOLD
(t
AH
)
t
SET
(t
AS
)
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