參數(shù)資料
型號(hào)： AM79C901AJC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： HomePHY Single-Chip 1/10 Mbps Home Networking PHY
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQCC68
封裝： PLASTIC, MO-047BAE, LCC-68
文件頁數(shù)： 22/90頁
文件大?。?/td> 714K
代理商： AM79C901AJC
22
Am79C901A
P R E L I M I N A R Y
BASIC FUNCTIONS
Network Interfaces
The Am79C901A PHY contains an integrated 1 Mbps
home networking PHY and a 10BASE-T PHY. This de-
vice is compliant with the HomePNA specification 1.0
and IEEE 802.3 specification.
The integrated HomePNA transceiver is a physical
layer device that enables data networking at speeds up
to 1 Mbps over existing residential phone wiring regard-
less of topology and without disrupting telephone
(POTS) service.
The integrated Ethernet transceiver is a physical layer
device supporting the IEEE 802.3 standard for
10BASE-T. It provides all of the PHY layer functions re-
quired to support 10 Mbps data transfer speeds. The
10BASE-T PHY supports both half-duplex and
full-duplex operation.
PHY Data Interfaces
The Am79C901A PHY has both GPSI and MII-com-
patible data interfaces. In addition, a special mode,
GM_MODE, allows access to the MDC/MDIO com-
mand and control interface while in the GPSI mode.
For more information, see the
Pin Descriptions
and
the
Detailed Functions
sections.
Reset
There are two different types of RESET operations that
may be performed on the Am79C901A device,
H_RESET or S_RESET. The following is a description
of each type of RESET operation.
H_RESET
Hardware Reset (H_RESET) is a reset operation that
has been initiated by the proper assertion of the
RESET pin of the Am79C901A device. When the
minimum pulse width timing as specified in the
RESET pin description has been satisfied, an inter-
nal reset operation will be performed.
H_RESET will program all of the registers to their
default value.
S_RESET
In a software reset (S_RESET), programming bit 15 of
HPR0 to 1 will reset all the registers in the 1 Mbps
HomePNA PHY (HPRs), and programming bit 15 of
TBR0 to 1 will reset TBR4, TBR7, TBR17, and TBR24
in the 10BASE-T PHY. These bits are self-clearing.
DETAILED FUNCTIONS
GPSI Interface
The seven signals that comprise the GPSI are TXCLK,
TXEN, TXDAT, RXCLK, RXCRS, RXDAT, and CLS. Of
these, only TXEN and TXDAT are inputs to the PHY;
the other five are outputs from the PHY. These signals
behave differently depending on which operation is cur-
rently happening in the PHY. The operations of the
PHY are as follows: Idle (no activity in either direction),
RXPKT (receiving data), and TXPKT (transmitting
data). The subsequent subsections analyze each
GPSI-related state of the PHY in detail.
Figure 1.
Idle State
TXCLK
TXEN
TXDAT
RXCLK
RXCRS
RXDAT
CLS
Note
:
RXCLK and TXCLK are synchronized to the same phase. All other signals are inactive. The two clock
signals toggle for an overall period of 583.3ns (about 1.7 MHz).
22304B-3
相關(guān)PDF資料
PDF描述
AM79C901AJCT HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AJI HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AJIT HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AVC HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AVCT HomePHY Single-Chip 1/10 Mbps Home Networking PHY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C901AJCT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AJI 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AJIT 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AVC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:HomePHY Single-Chip 1/10 Mbps Home Networking PHY
AM79C901AVC/w 制造商:Advanced Micro Devices 功能描述:79C901AVC/W
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*